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authorShawn Nematbakhsh <shawnn@chromium.org>2013-09-26 16:44:14 -0700
committerAaron Durbin <adurbin@google.com>2014-02-03 16:31:05 +0100
commitebe3b3cfe212a2e985e12f1ab93bdef4487733f5 (patch)
tree5bdac88a1a9667305e67853f784cbabc704e2ed8 /src/soc/intel/baytrail/Makefile.inc
parentc8f54a1109072706e2fa091dc9ab4ad3eb057b42 (diff)
baytrail: Add GPIO initial configuration infrastructure.
During ramstage, call mainboard_get_gpios to get initial GPIO configuration from the mainboard code, then initialize GPIOs as requested. BUG=chrome-os-partner:22863 TEST=Manual. Using bayleybay GPIO table, set UART GPIOs to 'function 1', and verify UART still works after GPIO configuration. Also, verify legacy GPIO config is functional by toggling test pin. Change-Id: Ic58d8ddd15c4dc48a751a83f6d26c7809c1efc42 Reviewed-on: https://chromium-review.googlesource.com/170306 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org> Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Tested-by: Shawn Nematbakhsh <shawnn@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4855 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/soc/intel/baytrail/Makefile.inc')
-rw-r--r--src/soc/intel/baytrail/Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc
index 756fd39f8f..ebcda6b93e 100644
--- a/src/soc/intel/baytrail/Makefile.inc
+++ b/src/soc/intel/baytrail/Makefile.inc
@@ -18,7 +18,7 @@ ramstage-y += iosf.c
romstage-y += iosf.c
ramstage-y += northcluster.c
ramstage-y += ramstage.c
-
+ramstage-y += gpio.c
# Remove as ramstage gets fleshed out
ramstage-y += placeholders.c