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| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-11-29 14:16:49 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-05 13:33:32 +0000 |
| commit | d5d20d03fea5d50152fac783cb0985dbaa66d782 (patch) | |
| tree | 0b020ad67d2a82f5371321d402b54631203e1990 /src/soc/intel/baytrail/Makefile.inc | |
| parent | f6cfbf380488d74f5b420d90d02e59399b83fed9 (diff) | |
soc/intel/baytrail: Implement POSTCAR stage
Use common code to tear down CAR.
Change-Id: I62a70ae35fe92808f180f2b5f21c5899a96c2c16
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29930
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/baytrail/Makefile.inc')
| -rw-r--r-- | src/soc/intel/baytrail/Makefile.inc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index 324dcdd715..3658f5a526 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -10,6 +10,7 @@ subdirs-y += ../../../cpu/intel/turbo ramstage-y += memmap.c romstage-y += memmap.c +postcar-y += memmap.c ramstage-y += tsc_freq.c romstage-y += tsc_freq.c smm-y += tsc_freq.c @@ -20,6 +21,7 @@ ramstage-y += gfx.c ramstage-y += iosf.c romstage-y += iosf.c smm-y += iosf.c +postcar-y += iosf.c ramstage-y += northcluster.c ramstage-y += ramstage.c ramstage-y += gpio.c @@ -51,6 +53,8 @@ ramstage-y += hda.c # Remove as ramstage gets fleshed out ramstage-y += placeholders.c +postcar-y += ../../../cpu/intel/car/non-evict/exit_car.S + cpu_microcode_bins += 3rdparty/blobs/soc/intel/baytrail/microcode.bin CPPFLAGS_common += -Isrc/soc/intel/baytrail/include |