aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel/baytrail/Makefile.inc
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-02 06:13:22 +0300
committerMartin Roth <martinroth@google.com>2019-08-03 17:34:40 +0000
commit26a682c9441b4f7312ff9f69d22029841aa245bd (patch)
tree1543a1ae418702e3258f35ab435ea9ad79583ebf /src/soc/intel/baytrail/Makefile.inc
parent825646e6431b51bd45349dbd2cb1d607e2eecae1 (diff)
intel/baytrail,broadwell: Move stage cache support function
Let garbage-collection take care of stage_cache_external_region() when it is not needed and move implementation to a suitable file already building for needed stages. Change-Id: Ia6adcc0c8bf6d4abc095ac669aaae876b33ed0f3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34669 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/baytrail/Makefile.inc')
-rw-r--r--src/soc/intel/baytrail/Makefile.inc2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc
index 3ad6a8f978..d9663462c6 100644
--- a/src/soc/intel/baytrail/Makefile.inc
+++ b/src/soc/intel/baytrail/Makefile.inc
@@ -13,7 +13,6 @@ romstage-y += iosf.c
romstage-y += memmap.c
romstage-y += pmutil.c
romstage-y += spi.c
-romstage-y += stage_cache.c
romstage-y += tsc_freq.c
postcar-y += iosf.c
@@ -45,7 +44,6 @@ ramstage-y += sd.c
ramstage-y += smm.c
ramstage-y += southcluster.c
ramstage-y += spi.c
-ramstage-y += stage_cache.c
ramstage-y += tsc_freq.c
ramstage-y += xhci.c
ramstage-$(CONFIG_ELOG) += elog.c