diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2013-11-05 12:59:50 -0800 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-06 17:20:07 +0200 |
| commit | 05a3393a2c089d0c7ad7443e2298dacd129fadb3 (patch) | |
| tree | 069c9e0c6ce4986f7a5aff7c7309ab912e0ca5a5 /src/soc/intel/baytrail/Makefile.inc | |
| parent | fd461e396b482cd5d0cd81cb11c4973f4ebfa94c (diff) | |
baytrail: Enable Turbo/Burst and set some magic MSRs
As far as I can tell turbo enabling behaves like
it did on haswell so use the standard code.
There are also some magic values to set in some magic
MSRs related to turbo and package power so they report
correctly.
The L2 cache shrink is enabled and a threshold is set
that makes both dual and quad core happy.
C1E is disabled to match the reference code.
BUG=chrome-os-partner:23505
BRANCH=rambi
TEST=build and boot on rambi
Change-Id: Ic6d4283d480a44d85a9b96571baf83928615665c
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175743
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4952
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/intel/baytrail/Makefile.inc')
| -rw-r--r-- | src/soc/intel/baytrail/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index 4f3a202914..81b2c24569 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -6,6 +6,7 @@ subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode +subdirs-y += ../../../cpu/intel/turbo ramstage-y += memmap.c romstage-y += memmap.c |