diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-06-04 14:51:19 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-27 13:47:11 +0000 |
| commit | b48d63359bb4beb63cf2e14edb7b1d833e602ce1 (patch) | |
| tree | b0afa3995446bc60aca5d8700cf9d43249a431a9 /src/soc/intel/baytrail/Kconfig | |
| parent | 4ff63d3a11014fa1a54c82a3023182059c5812f1 (diff) | |
soc/intel/baytrail: Use sb/intel/common/spi.c
This common implementation is compatible.
Change-Id: I2023bb7522ec40f1d9911cb5c57d7d66e4cefa6d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33206
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/baytrail/Kconfig')
| -rw-r--r-- | src/soc/intel/baytrail/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index fac14cbd3b..e96b53d321 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -18,6 +18,7 @@ config CPU_SPECIFIC_OPTIONS select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER select SOUTHBRIDGE_INTEL_COMMON_RESET + select SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT select NO_FIXED_XIP_ROM_SIZE select PARALLEL_MP select PCIEXP_ASPM |