diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-07-20 14:58:45 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-22 18:50:40 +0200 |
| commit | aa00e0893e947aa1f94913ff655637da0a8ef075 (patch) | |
| tree | af8d5dfc64fbf4b5d4abe42d0e54cbb5287875f9 /src/soc/intel/apollolake | |
| parent | 8a2f167e7b99c171161937f52ccf5bc4ac9d6685 (diff) | |
soc/intel/apollolake: die() when FSP silicon init fails
The reset requests are handled in the FSP 2.0 wrapper, but
the current code doesn't check any non-successful return
values. Provide parity with the memory init path which die()s
under those circumstances.
Change-Id: I9df61323f742b4e94294321e3ca3ab58a68ca4dd
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15766
Tested-by: build bot (Jenkins)
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/intel/apollolake')
| -rw-r--r-- | src/soc/intel/apollolake/chip.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 60cdb50753..c71e59a26c 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -201,7 +201,8 @@ static void soc_init(void *data) * default policy that doesn't honor boards' requirements. */ itss_snapshot_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END); - fsp_silicon_init(); + if (fsp_silicon_init() != FSP_SUCCESS) + die("FSP silicon init failed. Giving up."); /* Restore GPIO IRQ polarities back to previous settings. */ itss_restore_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END); |