diff options
author | Bora Guvendik <bora.guvendik@intel.com> | 2017-11-03 12:40:25 -0700 |
---|---|---|
committer | Subrata Banik <subrata.banik@intel.com> | 2017-12-07 05:45:55 +0000 |
commit | 94aed8d615be092143e838a4c3bf8895438d7235 (patch) | |
tree | ab404887bd7a265951f60707906511a3152f594e /src/soc/intel/apollolake | |
parent | c73073c4142882cab60a47de1611bece5851af18 (diff) |
soc/intel/apollolake: add ability to enable eSPI
Add config option to enable eSPI
TEST=Boot to OS
Change-Id: Ib4634690fe4fdb902fc0bc074a3b66b91921ddd5
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/22320
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Hannah Williams <hannah.williams@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/apollolake')
-rw-r--r-- | src/soc/intel/apollolake/Kconfig | 6 | ||||
-rw-r--r-- | src/soc/intel/apollolake/lpc.c | 2 |
2 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 99e50e3ec2..166c8eedb2 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -390,4 +390,10 @@ config SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL hex default 0x7fff +config SOC_ESPI + bool + default n + help + Use eSPI bus instead of LPC + endif diff --git a/src/soc/intel/apollolake/lpc.c b/src/soc/intel/apollolake/lpc.c index 8abf3eb9cd..95b8bf5fb7 100644 --- a/src/soc/intel/apollolake/lpc.c +++ b/src/soc/intel/apollolake/lpc.c @@ -45,6 +45,7 @@ const struct lpc_mmio_range *soc_get_fixed_mmio_ranges(void) static const struct pad_config lpc_gpios[] = { #if IS_ENABLED(CONFIG_SOC_INTEL_GLK) +#if !IS_ENABLED(CONFIG_SOC_ESPI) PAD_CFG_NF(GPIO_147, UP_20K, DEEP, NF1), /* LPC_ILB_SERIRQ */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_148, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPC_CLKOUT0 */ @@ -62,6 +63,7 @@ static const struct pad_config lpc_gpios[] = { DISPUPD), /* LPC_CLKRUNB */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_155, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPC_FRAMEB*/ +#endif /* !IS_ENABLED(CONFIG_SOC_ESPI) */ #else PAD_CFG_NF(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1), PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1), |