diff options
| author | Andrey Petrov <andrey.petrov@intel.com> | 2016-07-18 00:15:41 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-19 21:03:03 +0200 |
| commit | 3a94a3ba5b238067f382d07f92c57373003b79cc (patch) | |
| tree | 37e2b5da73fef0646590ac13306871a25b92dbed /src/soc/intel/apollolake | |
| parent | 1b1d4b7ae653e56ec7cdeec438487ae7ded0e62a (diff) | |
drivers/intel/fsp2_0: Split reset handling logic
FSP 2.0 spec only defines 2 reset request (COLD, WARM) exit codes. The
rest 6 codes are platform-specific and may vary. Modify helper function
so that only basic resets are handled and let SoC deal with the rest.
Change-Id: Ib2f446e0449301407b135933a2088bcffc3ac32a
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/15730
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/apollolake')
| -rw-r--r-- | src/soc/intel/apollolake/chip.c | 3 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/reset.c | 14 |
2 files changed, 15 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 3a6e90e5e2..60cdb50753 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -412,8 +412,7 @@ static void fsp_notify_dummy(void *arg) if ((ret = fsp_notify(ph)) != FSP_SUCCESS) { printk(BIOS_CRIT, "FspNotify failed, ret = %x!\n", ret); - if (fsp_reset_requested(ret)) - fsp_handle_reset(ret); + fsp_handle_reset(ret); } /* Call END_OF_FIRMWARE Notify after READY_TO_BOOT Notify */ if (ph == READY_TO_BOOT) { diff --git a/src/soc/intel/apollolake/reset.c b/src/soc/intel/apollolake/reset.c index f759bac06b..4bfdee4b75 100644 --- a/src/soc/intel/apollolake/reset.c +++ b/src/soc/intel/apollolake/reset.c @@ -15,6 +15,7 @@ #include <console/console.h> #include <delay.h> +#include <fsp/util.h> #include <reset.h> #include <soc/heci.h> #include <soc/pm.h> @@ -57,3 +58,16 @@ void reset_prepare(void) } printk(BIOS_SPEW, "CSE took %lu ms\n", stopwatch_duration_msecs(&sw)); } + +void chipset_handle_reset(enum fsp_status status) +{ + switch(status) { + case FSP_STATUS_RESET_REQUIRED_5: /* Global Reset */ + global_reset(); + break; + default: + printk(BIOS_ERR, "unhandled reset type %x\n", status); + die("unknown reset type"); + break; + } +} |