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authorSubrata Banik <subrata.banik@intel.com>2018-09-30 01:39:49 +0530
committerDuncan Laurie <dlaurie@chromium.org>2018-10-09 20:12:01 +0000
commita0729899d7aa2764b83ba7b8c00fe36a4bb3fb2e (patch)
treefe53266c8e39afcd8a2db30006f31020a973a890 /src/soc/intel/apollolake
parent50cdce95751d25e73abfe0bdd02c95029db8b7df (diff)
soc/intel/cannonlake: Make correct IRQ mapping for CNL SA and PCH PCI devices
This patch provides option for PCI IRQ mapping in both PIC and APIC mode. TEST=Build and Boot on CNL RVP. Change-Id: Ie26750ac9dc2ce940b0c116085c041de439075df Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/28799 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/apollolake')
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