soc/intel/apollolake: implement common gpio API

In order for apollolake mainboards to utilize the common GPIO API
it actually needs to be implemented.

Change-Id: I41de8d5d9f3c39e7e796eae73b01cb29e9c01347
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/14797
Tested-by: build bot (Jenkins)
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>

3 files changed, 52 insertions, 0 deletions

diff --git a/src/soc/intel/apollolake/gpio.c b/src/soc/intel/apollolake/gpio.c
index 3a7be07d0d..06db8c965a 100644
--- a/src/soc/intel/apollolake/gpio.c
+++ b/src/soc/intel/apollolake/gpio.c
@@ -16,6 +16,7 @@
  */
 
 #include <assert.h>
+#include <gpio.h>
 #include <soc/gpio.h>
 #include <soc/iosf.h>
 
@@ -66,3 +67,50 @@ void gpio_configure_pads(const struct pad_config *cfg, size_t num_pads)
 	for (i = 0; i < num_pads; i++)
 		gpio_configure_pad(cfg + i);
 }
+
+void gpio_input_pulldown(gpio_t gpio)
+{
+	struct pad_config cfg = PAD_CFG_GPI(gpio, DN_5K, DEEP);
+	gpio_configure_pad(&cfg);
+}
+
+void gpio_input_pullup(gpio_t gpio)
+{
+	struct pad_config cfg = PAD_CFG_GPI(gpio, UP_5K, DEEP);
+	gpio_configure_pad(&cfg);
+}
+
+void gpio_input(gpio_t gpio)
+{
+	struct pad_config cfg = PAD_CFG_GPI(gpio, NONE, DEEP);
+	gpio_configure_pad(&cfg);
+}
+
+void gpio_output(gpio_t gpio, int value)
+{
+	struct pad_config cfg = PAD_CFG_GPO(gpio, value, DEEP);
+	gpio_configure_pad(&cfg);
+}
+
+int gpio_get(gpio_t gpio_num)
+{
+	uint32_t reg;
+	const struct pad_community *comm = gpio_get_community(gpio_num);
+	uint16_t config_offset = PAD_CFG_OFFSET(gpio_num - comm->first_pad);
+
+	reg = iosf_read(comm->port, config_offset);
+
+	return !!(reg & PAD_CFG0_RX_STATE);
+}
+
+void gpio_set(gpio_t gpio_num, int value)
+{
+	uint32_t reg;
+	const struct pad_community *comm = gpio_get_community(gpio_num);
+	uint16_t config_offset = PAD_CFG_OFFSET(gpio_num - comm->first_pad);
+
+	reg = iosf_read(comm->port, config_offset);
+	reg &= ~PAD_CFG0_TX_STATE;
+	reg |= !!value & PAD_CFG0_TX_STATE;
+	iosf_write(comm->port, config_offset, reg);
+}
diff --git a/src/soc/intel/apollolake/include/soc/gpio.h b/src/soc/intel/apollolake/include/soc/gpio.h
index 7a254752f4..4d9973c21c 100644
--- a/src/soc/intel/apollolake/include/soc/gpio.h
+++ b/src/soc/intel/apollolake/include/soc/gpio.h
@@ -21,6 +21,8 @@
 #include <types.h>
 #include <soc/gpio_defs.h>
 
+typedef uint32_t gpio_t;
+
 #define PAD_FUNC(value)		PAD_CFG0_MODE_##value
 #define PAD_RESET(value)	PAD_CFG0_RESET_##value
 #define PAD_PULL(value)		PAD_CFG1_PULL_##value
diff --git a/src/soc/intel/apollolake/include/soc/gpio_defs.h b/src/soc/intel/apollolake/include/soc/gpio_defs.h
index 1d7e74a99c..30c4bdb272 100644
--- a/src/soc/intel/apollolake/include/soc/gpio_defs.h
+++ b/src/soc/intel/apollolake/include/soc/gpio_defs.h
@@ -23,6 +23,8 @@
 #ifndef _SOC_APOLLOLAKE_GPIO_DEFS_H_
 #define _SOC_APOLLOLAKE_GPIO_DEFS_H_
 
+#define PAD_CFG0_TX_STATE		(1 << 0)
+#define PAD_CFG0_RX_STATE		(1 << 1)
 #define PAD_CFG0_TX_DISABLE		(1 << 8)
 #define PAD_CFG0_RX_DISABLE		(1 << 9)
 #define PAD_CFG0_MODE_MASK		(7 << 10)