diff options
author | Christian Walter <christian.walter@9elements.com> | 2019-05-28 10:37:24 +0200 |
---|---|---|
committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2019-06-06 11:32:52 +0000 |
commit | f97232236891bc8f5c816a96c98807a0f2449234 (patch) | |
tree | d837ce5e4798e39b9b5df28a265f4ad6141200df /src/soc/intel/apollolake | |
parent | fa36c6c3eed187f3ebc912eede900c8889df481d (diff) |
src/soc/intel/common/smbios: Add addtional infos to dimm_info
Add ECC Support and VDD Voltage to dimm_info struct. Now Bus Width
and ECCSupport will be propagated correctly in SMBIOS Type 17 Entry.
Change-Id: Ic6f0d4b223f1490ec7aa71a6105603635b514021
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33031
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake')
-rw-r--r-- | src/soc/intel/apollolake/meminit_util_apl.c | 4 | ||||
-rw-r--r-- | src/soc/intel/apollolake/meminit_util_glk.c | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/meminit_util_apl.c b/src/soc/intel/apollolake/meminit_util_apl.c index b272a99efe..16d14d945f 100644 --- a/src/soc/intel/apollolake/meminit_util_apl.c +++ b/src/soc/intel/apollolake/meminit_util_apl.c @@ -91,7 +91,9 @@ void save_lpddr4_dimm_info_part_num(const char *dram_part_num) dram_part_num, strlen(dram_part_num), NULL, /* SPD not available */ - memory_info_hob->DataWidth); + memory_info_hob->DataWidth, + 0, + 0); index++; } } diff --git a/src/soc/intel/apollolake/meminit_util_glk.c b/src/soc/intel/apollolake/meminit_util_glk.c index 29dcd56767..59e133076a 100644 --- a/src/soc/intel/apollolake/meminit_util_glk.c +++ b/src/soc/intel/apollolake/meminit_util_glk.c @@ -97,7 +97,9 @@ void save_lpddr4_dimm_info_part_num(const char *dram_part_num) dram_part_num, strlen(dram_part_num), src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL, - memory_info_hob->DataWidth); + memory_info_hob->DataWidth, + 0, + 0); index++; } } |