diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2020-10-31 22:01:55 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-02 10:43:53 +0000 |
| commit | 4ed9f9a507a8b3419bc45431b8f1afb02c728a9e (patch) | |
| tree | e7162cab8a10d65af58b481bb681845d7ae5abbb /src/soc/intel/apollolake | |
| parent | 2b2ade96384791d7320d87bc0e29445002b6d246 (diff) | |
soc/intel: Use of common reset code block
This patch removes all redundant reset code block from each SoC
and make use of common reset code block(fsp_reset.c) based on
SOC_INTEL_COMMON_FSP_RESET.
Respective SoC Kconfig to choose correct FSP global reset type as
per FSP integration guide.
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: I71531f4cf7a40efa9ec55c48c2cb4fb6ea90531f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45337
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/apollolake')
| -rw-r--r-- | src/soc/intel/apollolake/Kconfig | 2 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/reset.c | 14 |
2 files changed, 2 insertions, 14 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 0c8eae2264..3917feaf79 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -38,6 +38,7 @@ config CPU_SPECIFIC_OPTIONS # Misc options select CACHE_MRC_SETTINGS select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS + select FSP_STATUS_GLOBAL_RESET_REQUIRED_5 select GENERIC_GPIO_LIB select INTEL_DESCRIPTOR_MODE_CAPABLE select HAVE_SMI_HANDLER @@ -91,6 +92,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_SPI select SOC_INTEL_COMMON_BLOCK_CSE select SOC_INTEL_COMMON_BLOCK_SMBUS + select SOC_INTEL_COMMON_FSP_RESET select SOUTHBRIDGE_INTEL_COMMON_SMBUS select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/soc/intel/apollolake/reset.c b/src/soc/intel/apollolake/reset.c index 8641b63aaf..186a546388 100644 --- a/src/soc/intel/apollolake/reset.c +++ b/src/soc/intel/apollolake/reset.c @@ -3,7 +3,6 @@ #include <cf9_reset.h> #include <console/console.h> #include <delay.h> -#include <fsp/util.h> #include <intelblocks/pmclib.h> #include <soc/heci.h> #include <soc/intel/common/reset.h> @@ -47,16 +46,3 @@ void cf9_reset_prepare(void) } printk(BIOS_SPEW, "CSE took %lu ms\n", stopwatch_duration_msecs(&sw)); } - -void chipset_handle_reset(uint32_t status) -{ - switch (status) { - case FSP_STATUS_RESET_REQUIRED_5: /* Global Reset */ - global_reset(); - break; - default: - printk(BIOS_ERR, "unhandled reset type %x\n", status); - die("unknown reset type"); - break; - } -} |