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authorAngel Pons <th3fanbus@gmail.com>2020-09-07 13:18:10 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-09-09 10:34:32 +0000
commitb36100faf49c5a01e062e93b9a2fe542709fb6bd (patch)
treead70742077d0185b38d72ce2ff264a3c7f81ecea /src/soc/intel/apollolake/xhci.c
parentee735945754180544c8bd060d6fc0b9b2c507360 (diff)
soc/intel/apollolake: Rename `SOC_INTEL_GLK` symbol
For consistency with other platforms, use `SOC_INTEL_GEMINILAKE`. Change-Id: I06310e5a9bca6c9504f19a6c2fe9b26626f290d4 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45141 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/apollolake/xhci.c')
-rw-r--r--src/soc/intel/apollolake/xhci.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/xhci.c b/src/soc/intel/apollolake/xhci.c
index 4396eaa67d..4584dc7085 100644
--- a/src/soc/intel/apollolake/xhci.c
+++ b/src/soc/intel/apollolake/xhci.c
@@ -3,7 +3,7 @@
#include <intelblocks/xhci.h>
#define XHCI_USB2_PORT_STATUS_REG 0x480
-#if CONFIG(SOC_INTEL_GLK)
+#if CONFIG(SOC_INTEL_GEMINILAKE)
#define XHCI_USB3_PORT_STATUS_REG 0x510
#define XHCI_USB2_PORT_NUM 9
#else