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authorMartin Roth <martinroth@google.com>2016-04-14 16:41:11 -0600
committerMartin Roth <martinroth@google.com>2016-04-16 01:52:43 +0200
commit433e8d272d1f1b3f6daaa89add5a886e348f29ea (patch)
treeb1296284d027ba0b16cf4a330d66ffc669e012f9 /src/soc/intel/apollolake/uart_early.c
parent59493717ad7aee5e4d6179b00c66b21af79e0376 (diff)
intel/apollolake: Fix whitespace issues
Change-Id: Ia5bcd19d994e23375d7e6d2050113c809ae57296 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/14368 Tested-by: build bot (Jenkins) Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Diffstat (limited to 'src/soc/intel/apollolake/uart_early.c')
-rw-r--r--src/soc/intel/apollolake/uart_early.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/uart_early.c b/src/soc/intel/apollolake/uart_early.c
index 469d56368a..e8dfeda565 100644
--- a/src/soc/intel/apollolake/uart_early.c
+++ b/src/soc/intel/apollolake/uart_early.c
@@ -52,7 +52,7 @@ void lpss_console_uart_init(void)
pci_write_config32(uart, PCI_COMMAND,
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
- /* Take UART out of reset */
+ /* Take UART out of reset */
lpss_uart_write(UART_RESET, UART_RESET_UART_EN);
/* These values get us a 1.836 MHz clock (ideally we want 1.843 MHz) */