diff options
| author | Shaunak Saha <shaunak.saha@intel.com> | 2016-07-24 20:50:12 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-10 21:10:59 +0200 |
| commit | 09115a92f6ac6123a6f1ed435c05fe60dc01d58c (patch) | |
| tree | 9c6b16087c872cb140c5b447c33ebae3a78e2e23 /src/soc/intel/apollolake/smihandler.c | |
| parent | a46ee4d34d6b7ce7d47882779c7fb36270ccbda1 (diff) | |
soc/apollolake: add GPIO SMI support
GPIOs which trigger SMIs set the GPIO_SMI_STS status bits in SMI_STS
register. This patch also sets the SMI_EN bit in enable register for
each community based on GPIOROUTSMI bit in gpio pad. When SMI on a
gpio happens status needs to be gathered on gpio number which is done
by reading the GPI_SMI_STS and GPI_SMI_EN registers.
BUG=chrome-os-partner:54977
TEST=When system is in firmware mode executing the command
lidclose from ec console shuts down the system.
Change-Id: Id89a526106d1989c2bd3416ab81913e6cf743d17
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/15833
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/apollolake/smihandler.c')
| -rw-r--r-- | src/soc/intel/apollolake/smihandler.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/smihandler.c b/src/soc/intel/apollolake/smihandler.c index 1521920fa1..b84e5cb296 100644 --- a/src/soc/intel/apollolake/smihandler.c +++ b/src/soc/intel/apollolake/smihandler.c @@ -30,6 +30,7 @@ #include <spi-generic.h> #include <stdint.h> #include <stdlib.h> +#include <soc/smm.h> int smm_disable_busmaster(device_t dev) { @@ -43,10 +44,25 @@ const struct smm_save_state_ops *get_smm_save_state_ops(void) return &em64t100_smm_ops; } +void __attribute__((weak)) +mainboard_smi_gpi_handler(const struct gpi_status *sts) { } + +static void southbridge_smi_gpi(const struct smm_save_state_ops *save_state_ops) +{ + struct gpi_status smi_sts; + + gpi_clear_get_smi_status(&smi_sts); + mainboard_smi_gpi_handler(&smi_sts); + + /* Clear again after mainboard handler */ + gpi_clear_get_smi_status(&smi_sts); +} + const smi_handler_t southbridge_smi[32] = { [SLP_SMI_STS] = southbridge_smi_sleep, [APM_SMI_STS] = southbridge_smi_apmc, [FAKE_PM1_SMI_STS] = southbridge_smi_pm1, + [GPIO_SMI_STS] = southbridge_smi_gpi, [TCO_SMI_STS] = southbridge_smi_tco, [PERIODIC_SMI_STS] = southbridge_smi_periodic, }; |