diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2020-02-20 11:53:04 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-02-23 13:41:36 +0000 |
| commit | 4ab7ef93ee6fef0f12a9237486fa1cacf9a9c84a (patch) | |
| tree | ce0e7ba258f203817899cf84a102250209c72370 /src/soc/intel/apollolake/smihandler.c | |
| parent | f5529d9edc82666e1ac410c0042099228f6e6734 (diff) | |
soc/intel/apollolake: Make SMI_STS offset macro definition consistent
This patch makes all bit field macro definition for SMI_STS register
(offset 0x44) be consistent i.e. ending with "_STS_BIT".
Also modified relevant files where those macros are getting used.
Change-Id: Ibe3fbb459c106a3a58cd9a8b6eb3d7ee92e6ed82
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39022
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/apollolake/smihandler.c')
| -rw-r--r-- | src/soc/intel/apollolake/smihandler.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/soc/intel/apollolake/smihandler.c b/src/soc/intel/apollolake/smihandler.c index 53d2b7e858..424d66f0d7 100644 --- a/src/soc/intel/apollolake/smihandler.c +++ b/src/soc/intel/apollolake/smihandler.c @@ -38,19 +38,19 @@ const struct smm_save_state_ops *get_smm_save_state_ops(void) uint32_t smihandler_soc_get_sci_mask(void) { uint32_t sci_mask = - SMI_HANDLER_SCI_EN(APM_SMI_STS) | - SMI_HANDLER_SCI_EN(SLP_SMI_STS); + SMI_HANDLER_SCI_EN(APM_STS_BIT) | + SMI_HANDLER_SCI_EN(SMI_ON_SLP_EN_STS_BIT); return sci_mask; } const smi_handler_t southbridge_smi[32] = { - [SLP_SMI_STS] = smihandler_southbridge_sleep, - [APM_SMI_STS] = smihandler_southbridge_apmc, - [FAKE_PM1_SMI_STS] = smihandler_southbridge_pm1, - [GPIO_SMI_STS] = smihandler_southbridge_gpi, - [TCO_SMI_STS] = smihandler_southbridge_tco, - [PERIODIC_SMI_STS] = smihandler_southbridge_periodic, + [SMI_ON_SLP_EN_STS_BIT] = smihandler_southbridge_sleep, + [APM_STS_BIT] = smihandler_southbridge_apmc, + [PM1_STS_BIT] = smihandler_southbridge_pm1, + [GPIO_STS_BIT] = smihandler_southbridge_gpi, + [TCO_STS_BIT] = smihandler_southbridge_tco, + [PERIODIC_STS_BIT] = smihandler_southbridge_periodic, #if CONFIG(SOC_ESPI) [ESPI_SMI_STS_BIT] = smihandler_southbridge_espi, #endif |