diff options
| author | Patrick Rudolph <siro@das-labor.org> | 2018-10-01 19:17:11 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-10-22 08:35:32 +0000 |
| commit | f677d17ab3cfd1471c0f238a0d32b0d56dd8d37f (patch) | |
| tree | 9b0c01512de536210262110ac4e7dfb78d6849c1 /src/soc/intel/apollolake/romstage.c | |
| parent | 45022ae056cdbf58429b77daf2da176306312801 (diff) | |
intel: Use CF9 reset (part 2)
Make use of the common CF9 reset in SOC_INTEL_COMMON_RESET. Also
implement board_reset() as a "full reset" (aka. cold reset) as that
is what was used here for hard_reset().
Drop soc_reset_prepare() thereby, as it was only used for APL. Also,
move the global-reset logic.
We leave some comments to remind us that a system_reset() should
be enough, where a full_reset() is called now (to retain current
behaviour) and looks suspicious.
Note, as no global_reset() is implemented for Denverton-NS, we halt
there now instead of issuing a non-global reset. This seems safer;
a non-global reset might result in a reset loop.
Change-Id: I5e7025c3c9ea6ded18e72037412b60a1df31bd53
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/29169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/romstage.c')
| -rw-r--r-- | src/soc/intel/apollolake/romstage.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 995564d717..d2ec6c1fa8 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -24,6 +24,7 @@ #include <bootmode.h> #include <cbfs.h> #include <cbmem.h> +#include <cf9_reset.h> #include <console/console.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/pae.h> @@ -38,7 +39,6 @@ #include <intelblocks/systemagent.h> #include <intelblocks/pmclib.h> #include <mrc_cache.h> -#include <reset.h> #include <soc/cpu.h> #include <soc/iomap.h> #include <soc/meminit.h> @@ -285,7 +285,7 @@ static void check_full_retrain(const FSPM_UPD *mupd) if (ps->gen_pmcon1 & WARM_RESET_STS) { printk(BIOS_INFO, "Full retrain unsupported on warm reboot.\n"); - hard_reset(); + full_reset(); } } |