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| author | Furquan Shaikh <furquan@chromium.org> | 2017-10-25 09:52:53 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-10-25 17:12:40 +0000 |
| commit | f5e8fe5d95844cafc100b409cea1f15e62a51e9c (patch) | |
| tree | fd3ad9ad6dc2a95ef3e6721cd1222ed963913d77 /src/soc/intel/apollolake/romstage.c | |
| parent | af8839888758d25943fbc64eea29b18634a41c4f (diff) | |
soc/intel/apollolake: Fix broken GNVS offset for chromeos
Change 03a235(soc/intel/apollolake: Add GNVS variables and include SGX
ASL) added new GNVS variables but did not adjust the unused array size
and thus broke chromeos offset.
This change fixes the above issue by reducing the size of unused array.
BUG=b:68254376
TEST=Verified that chromeos offset is correct. crossystem is able to
read all variables.
Change-Id: I279bfc4c702e46b88c1c7a067a24326ff8fed368
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/22177
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake/romstage.c')
0 files changed, 0 insertions, 0 deletions