diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2016-11-21 12:41:20 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-12-07 20:23:01 +0100 |
| commit | d6c555971b9f9f0c2d49269b0874e3480258531a (patch) | |
| tree | d6dfa1bcbf1f122cac1b3f62f6eb0a86901c45ac /src/soc/intel/apollolake/romstage.c | |
| parent | b5d41cb063a54d2a90e0480ede18d3b9c1ae8474 (diff) | |
soc/intel/apollolake: Use the new SPI driver interface
1. Define controller for fast SPI.
2. Separate out functions that are specific to SPI and flash controller
in different files.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully for reef.
Change-Id: If07db9d27bbf4f4eb6024175cb7753c6cf4fb793
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17562
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/apollolake/romstage.c')
| -rw-r--r-- | src/soc/intel/apollolake/romstage.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 039b586263..77562c4699 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -32,14 +32,15 @@ #include <fsp/memmap.h> #include <fsp/util.h> #include <soc/cpu.h> +#include <soc/flash_ctrlr.h> #include <soc/intel/common/mrc_cache.h> #include <soc/iomap.h> #include <soc/northbridge.h> #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/romstage.h> -#include <soc/spi.h> #include <soc/uart.h> +#include <spi_flash.h> #include <string.h> #include <timestamp.h> #include <timer.h> @@ -316,7 +317,12 @@ void mainboard_save_dimm_info(void) int get_sw_write_protect_state(void) { uint8_t status; + struct spi_flash *flash; + + flash = spi_flash_probe(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, 0); + if (!flash) + return 0; /* Return unprotected status if status read fails. */ - return spi_read_status(&status) ? 0 : !!(status & 0x80); + return spi_flash_status(flash, &status) ? 0 : !!(status & 0x80); } |