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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-07-24 18:18:52 -0700 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2016-08-03 06:17:02 +0200 |
| commit | 9671faa497f1b2be70e5638c53878c4b9cdd9a25 (patch) | |
| tree | 13aa658d0f31afceab9a02e18887e4213a2f919e /src/soc/intel/apollolake/romstage.c | |
| parent | 52d0c682bf3bb39584a1edd6e7326a6f4c1267f7 (diff) | |
drivers/intel/fsp2_0: FSP driver handles all FSP errors
Move all FSP error handling into the FSP 2.0 driver. This removes the
need to implement error handling within the SOC code.
TEST=Build and run on Galileo Gen2
Change-Id: I4d548b4c90d369d3857c24f50f93e7db7e9d3028
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15853
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/romstage.c')
| -rw-r--r-- | src/soc/intel/apollolake/romstage.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index da7fcf10b7..8f17fddd69 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -114,11 +114,7 @@ asmlinkage void car_stage_entry(void) console_init(); s3wake = fill_power_state(ps) == ACPI_S3; - - if (fsp_memory_init(s3wake) != FSP_SUCCESS) { - die("FSP memory init failed. Giving up."); - } - + fsp_memory_init(s3wake); if (postcar_frame_init(&pcf, 1*KiB)) die("Unable to initialize postcar frame.\n"); |