diff options
author | Hannah Williams <hannah.williams@intel.com> | 2017-05-05 16:30:22 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2017-07-21 03:59:09 +0000 |
commit | 3ff14a0c8590705ba4cc184f6e9d6e5f6302fb4c (patch) | |
tree | b7e9a0d1a14365ff1cdccce168dc6c94d0e05e0d /src/soc/intel/apollolake/romstage.c | |
parent | a77c68adf3a566e3eaa676d5fa4080ed41199e4b (diff) |
soc/intel/apollolake: Bring in delta for GLK SOC
Change-Id: I3e76726bb77f0277ab5776ae9d3d42b7eb389fe3
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/19603
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/romstage.c')
-rw-r--r-- | src/soc/intel/apollolake/romstage.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 7c9268af14..9dad15fc3a 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -165,10 +165,12 @@ static bool punit_init(void) PUINT_THERMAL_DEVICE_IRQ_VEC_NUMBER | PUINT_THERMAL_DEVICE_IRQ_LOCK; - data = MCHBAR32(0x7818); - data &= 0xFFFFE01F; - data |= 0x20 | 0x200; - MCHBAR32(0x7818) = data; + if (!IS_ENABLED(CONFIG_SOC_INTEL_GLK)) { + data = MCHBAR32(0x7818); + data &= 0xFFFFE01F; + data |= 0x20 | 0x200; + MCHBAR32(0x7818) = data; + } /* Stage0 BIOS Reset Complete (RST_CPL) */ enable_bios_reset_cpl(); |