diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-09-28 00:20:27 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-02 11:21:10 +0000 |
| commit | d5f645c6cde230004ee5af6c62d451d1329928e9 (patch) | |
| tree | eb87509c96e5ee1fa26e87594c75a399d92402e2 /src/soc/intel/apollolake/romstage.c | |
| parent | d3d38c95b7c23c5bd455d35e1b5bef0bce7b2cc5 (diff) | |
soc/intel: Replace config_of_path() with config_of_soc()
The previously provided device path made no difference, all
integrated PCI devices point back to the same chip_info
structure.
Change reduces the exposure of various SA_DEVFN_xx and
PCH_DEVFN_xx from (ugly) soc/pci_devs.h.
Change-Id: Ibf13645fdd3ef7fd3d5c8217bb24d7ede045c790
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/romstage.c')
| -rw-r--r-- | src/soc/intel/apollolake/romstage.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 29498656dc..8418919bd2 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -95,7 +95,7 @@ static void soc_early_romstage_init(void) static void configure_thermal_target(void) { msr_t msr; - const config_t *conf = config_of_path(SA_DEVFN_ROOT); + const config_t *conf = config_of_soc(); if (!conf->tcc_offset) return; @@ -269,7 +269,7 @@ static void soc_memory_init_params(FSPM_UPD *mupd) /* Only for GLK */ FSP_M_CONFIG *m_cfg = &mupd->FspmConfig; - const config_t *config = config_of_path(PCH_DEVFN_LPC); + const config_t *config = config_of_soc(); m_cfg->PrmrrSize = config->PrmrrSize; |