diff options
| author | Brandon Breitenstein <brandon.breitenstein@intel.com> | 2016-07-27 17:34:45 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-09-02 18:12:24 +0200 |
| commit | c31ba0ef529ef571ea839572f2c701a871cb33d7 (patch) | |
| tree | 32b38059ace1ce791edabe57ddd8f4056776258c /src/soc/intel/apollolake/reset.c | |
| parent | e96543e1fa3510a735d6de391b89ac350f56d287 (diff) | |
drivers/intel/fsp2_0: Make FSP Headers Consumable out of Box
The following patch is based off of the UEFI 2.6 patch. The FSP header files
are temporarily staying in soc/intel/apollolake and FspUpd.h has been relocated
since the other headers expect it to be in the root of an includable directory.
Any struct defines were removed since they are defined in the headers and no
longer need to be explicity declared as struct with the UEFI 2.6 includes.
BUG=chrome-os-partner:54100
BRANCH=none
TEST=confirmed coreboot builds successfully
Change-Id: I10739dca1b6da3f15bd850adf06238f7c51508f7
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>#
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/16308
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/reset.c')
| -rw-r--r-- | src/soc/intel/apollolake/reset.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/reset.c b/src/soc/intel/apollolake/reset.c index 4bfdee4b75..3e62d818fa 100644 --- a/src/soc/intel/apollolake/reset.c +++ b/src/soc/intel/apollolake/reset.c @@ -59,7 +59,7 @@ void reset_prepare(void) printk(BIOS_SPEW, "CSE took %lu ms\n", stopwatch_duration_msecs(&sw)); } -void chipset_handle_reset(enum fsp_status status) +void chipset_handle_reset(uint32_t status) { switch(status) { case FSP_STATUS_RESET_REQUIRED_5: /* Global Reset */ |