diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-05-26 11:00:44 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-05-27 19:53:34 +0200 |
| commit | bef75e7dd9450679d1605df8326a4dfbf2800ff9 (patch) | |
| tree | b796db12537b2a6d9c4fa5c618957b18652a5ac9 /src/soc/intel/apollolake/pmutil.c | |
| parent | 10221a0e570717760087163b075f7f535f882b61 (diff) | |
soc/intel/apollolake: add support for verstage
There previously was no support for building verstage on apollolake.
Add that suport by linking in the appropriate modules as well as
providing vboot_platform_is_resuming(). The link address for verstage
is the same as FSP-M because they would never be in CAR along side
each other. Additionally, program the ACPI I/O BAR and enable decoding
so sleep state can be determined for early firmware verification.
Change-Id: I1a0baab342ac55fd82dbed476abe0063787e3491
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/14972
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/apollolake/pmutil.c')
| -rw-r--r-- | src/soc/intel/apollolake/pmutil.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c index 16c8a0459a..9340ba53d2 100644 --- a/src/soc/intel/apollolake/pmutil.c +++ b/src/soc/intel/apollolake/pmutil.c @@ -26,6 +26,7 @@ #include <soc/pm.h> #include <device/device.h> #include <device/pci.h> +#include <vendorcode/google/chromeos/vboot_common.h> static uintptr_t read_pmc_mmio_bar(void) { @@ -336,3 +337,14 @@ int fill_power_state(struct chipset_power_state *ps) printk(BIOS_DEBUG, "prev_sleep_state %d\n", ps->prev_sleep_state); return ps->prev_sleep_state; } + +int vboot_platform_is_resuming(void) +{ + int typ; + + if (!(inw(ACPI_PMIO_BASE + PM1_STS) & WAK_STS)) + return 0; + + typ = (inl(ACPI_PMIO_BASE + PM1_CNT) & SLP_TYP) >> SLP_TYP_SHIFT; + return typ == SLP_TYP_S3; +} |