diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-06-10 18:01:45 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-06-12 12:50:08 +0200 |
| commit | 7929dd02e68ba52a41c5a8a48b6b7bf8b918677d (patch) | |
| tree | 205f6d9ae144dc4fef2133be8508a4187f799617 /src/soc/intel/apollolake/pmutil.c | |
| parent | 266a1f794dc28053e97794cbeb3f1a588137698b (diff) | |
soc/intel/apollolake: add SMI status bit definitons and use them
Provide the bit definitions for the SMI status register. Also,
utilize them which means deleting some of the handlers that can't
exist because there are no status bits.
BUG=chrome-os-partner:54262
Change-Id: I389c7cb3cad01ba0eca52a337ffee352a2010bfa
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15154
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/apollolake/pmutil.c')
| -rw-r--r-- | src/soc/intel/apollolake/pmutil.c | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c index 9340ba53d2..bebc1c7178 100644 --- a/src/soc/intel/apollolake/pmutil.c +++ b/src/soc/intel/apollolake/pmutil.c @@ -55,26 +55,26 @@ static void print_num_status_bits(int num_bits, uint32_t status, static uint32_t print_smi_status(uint32_t smi_sts) { static const char * const smi_sts_bits[] = { - [2] = "BIOS", - [3] = "LEGACY USB", - [4] = "SLP_SMI", - [5] = "APM", - [6] = "SWSMI_TMR", - [10]= "GPIO_SMI", - [11]= "GPIO_UNLOCK_SSMI", - [12] = "MCSMI", - [13] = "TCO", - [14] = "PERIODIC", - [15] = "SERIRQ", - [16] = "SMBUS_SMI", - [17] = "XHCI", - [18] = "HOST_SMBUS", - [19] = "SCS", - [20] = "PCI_EXP_SMI", - [21] = "SCC2", - [25] = "SPI_SSMI", - [26] = "SPI", - [27] = "OCP_CSE", + [BIOS_SMI_STS] = "BIOS", + [LEGACY_USB_SMI_STS] = "LEGACY USB", + [SLP_SMI_STS] = "SLP_SMI", + [APM_SMI_STS] = "APM", + [SWSMI_TMR_SMI_STS] = "SWSMI_TMR", + [GPIO_SMI_STS]= "GPIO_SMI", + [GPIO_UNLOCK_SMI_STS]= "GPIO_UNLOCK_SSMI", + [MC_SMI_STS] = "MCSMI", + [TCO_SMI_STS] = "TCO", + [PERIODIC_SMI_STS] = "PERIODIC", + [SERIRQ_SMI_STS] = "SERIRQ", + [SMBUS_SMI_STS] = "SMBUS_SMI", + [XHCI_SMI_STS] = "XHCI", + [HSMBUS_SMI_STS] = "HOST_SMBUS", + [SCS_SMI_STS] = "SCS", + [PCIE_SMI_STS] = "PCI_EXP_SMI", + [SCC2_SMI_STS] = "SCC2", + [SPI_SSMI_STS] = "SPI_SSMI", + [SPI_SMI_STS] = "SPI", + [PMC_OCP_SMI_STS] = "OCP_CSE", }; if (!smi_sts) |