diff options
author | Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> | 2016-06-22 18:32:17 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-06-27 22:32:26 +0200 |
commit | b023e5e32f763c2f48ac14fab4979d3493b39983 (patch) | |
tree | a30993d788a18e33184f3879dd2eefecbfa47907 /src/soc/intel/apollolake/include | |
parent | 4c1cb4287b21e4ec33795249925cb9c522d5095f (diff) |
soc/intel/apollolake: add code to disable unused device
Parse the devicetree and pass the unused device to fsp
for disabling the device function.
BRANCH=none
BUG=chrome-os-partner:54325
TEST=device off in devicetree should disable the device.
Change-Id: I784b72a43fda13aa17634bf680205ab2d36e8d09
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Reviewed-on: https://review.coreboot.org/15337
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/apollolake/include')
-rw-r--r-- | src/soc/intel/apollolake/include/soc/pci_devs.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/include/soc/pci_devs.h b/src/soc/intel/apollolake/include/soc/pci_devs.h index d11b9a7172..fc046d13ab 100644 --- a/src/soc/intel/apollolake/include/soc/pci_devs.h +++ b/src/soc/intel/apollolake/include/soc/pci_devs.h @@ -47,4 +47,33 @@ #define SPI_DEV PCI_DEV(0, 0xd, 2) #define LPC_DEV PCI_DEV(0, 0x1f, 0) +#define ISH_DEVFN PCI_DEVFN(0x11, 0) +#define SATA_DEVFN PCI_DEVFN(0x12, 0) +#define PCIEA0_DEVFN PCI_DEVFN(0x13, 0) +#define PCIEA1_DEVFN PCI_DEVFN(0x13, 1) +#define PCIEA2_DEVFN PCI_DEVFN(0x13, 2) +#define PCIEA3_DEVFN PCI_DEVFN(0x13, 3) +#define PCIEB0_DEVFN PCI_DEVFN(0x14, 0) +#define PCIEB1_DEVFN PCI_DEVFN(0x14, 1) +#define XHCI_DEVFN PCI_DEVFN(0x15, 0) +#define XDCI_DEVFN PCI_DEVFN(0x15, 1) +#define I2C0_DEVFN PCI_DEVFN(0x16, 0) +#define I2C1_DEVFN PCI_DEVFN(0x16, 1) +#define I2C2_DEVFN PCI_DEVFN(0x16, 2) +#define I2C3_DEVFN PCI_DEVFN(0x16, 3) +#define I2C4_DEVFN PCI_DEVFN(0x17, 0) +#define I2C5_DEVFN PCI_DEVFN(0x17, 1) +#define I2C6_DEVFN PCI_DEVFN(0x17, 2) +#define I2C7_DEVFN PCI_DEVFN(0x17, 3) +#define UART0_DEVFN PCI_DEVFN(0x18, 0) +#define UART1_DEVFN PCI_DEVFN(0x18, 1) +#define UART2_DEVFN PCI_DEVFN(0x18, 2) +#define UART3_DEVFN PCI_DEVFN(0x18, 3) +#define SPI0_DEVFN PCI_DEVFN(0x19, 0) +#define SPI1_DEVFN PCI_DEVFN(0x19, 1) +#define SPI2_DEVFN PCI_DEVFN(0x19, 2) +#define SDCARD_DEVFN PCI_DEVFN(0x1b, 0) +#define EMMC_DEVFN PCI_DEVFN(0x1c, 0) +#define SDIO_DEVFN PCI_DEVFN(0x1e, 0) +#define SMBUS_DEVFN PCI_DEVFN(0x1f, 1) #endif |