diff options
| author | Brandon Breitenstein <brandon.breitenstein@intel.com> | 2017-06-08 17:32:02 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-06-20 18:30:43 +0200 |
| commit | a86d1b8af564c291100a854cf8bb64fbe34ee952 (patch) | |
| tree | ed7d8f80452f68eb70cba89bf4351877bb6ce982 /src/soc/intel/apollolake/include | |
| parent | d9351099ef5ca58a6153da1b782178bda22bc879 (diff) | |
soc/intel/common: Add SMM common code for Intel Platforms
SMI code is very similar across Intel platforms. Move this code to
common/block/smi to allow it to be shared between platforms instead
of duplicating the code for each platform. smihandler.h has already
been made common so all it will contain is name changes and a move
to the common block location. Due to moving smihandler code, APL
changes are bundled here to show this change.
Change-Id: I599358f23d5de7564ef1ca414bccd54cebab5a4c
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Reviewed-on: https://review.coreboot.org/19392
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/include')
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/pm.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h index 7db63f6bdc..6c189198ab 100644 --- a/src/soc/intel/apollolake/include/soc/pm.h +++ b/src/soc/intel/apollolake/include/soc/pm.h @@ -82,6 +82,20 @@ #define EOS (1 << SMI_EOS) /* End of SMI (deassert SMI#) */ #define GBL_SMI_EN (1 << SMI_GBL) /* Global SMI Enable */ +/* SMI_EN Params for this platform to pass to enable_smi + * + * Enable SMI generation: + * - on APMC writes (io 0xb2) + * - on writes to SLP_EN (sleep states) + * - on writes to GBL_RLS (bios commands) + * - on eSPI events (does nothing on LPC systems) + * No SMIs: + * - on microcontroller writes (io 0x62/0x66) + * - on TCO events + */ +#define ENABLE_SMI_PARAMS \ + (APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS | GPIO_EN) + #define SMI_STS 0x44 /* Bits for SMI status */ #define PMC_OCP_SMI_STS 27 |