diff options
| author | Kane Chen <kane.chen@intel.com> | 2017-01-11 12:53:58 +0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-01-14 01:17:40 +0100 |
| commit | 9d490daf8d8327f8f01123cf152edf75474f54ce (patch) | |
| tree | 3dbb52467489008af011bf35586a81894a701a10 /src/soc/intel/apollolake/include | |
| parent | e7056a82e098f3d1eb368ef4be021264cb54f20a (diff) | |
soc/intel/apollolake: Allow USB2 eye pattern configuration in devicetree
This code allows people to override the usb2 eye pattern
UPD settings for boards.
BUG=chrome-os-partner:61031
BRANCH=None
TEST=Usb2 function ok and make sure fsp upd is overridden
Change-Id: I5fab620a29aba196edf1f24ffe6a1695de1e523e
Signed-off-by: Kane Chen <kane.chen@intel.com>
Reviewed-on: https://review.coreboot.org/18060
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/include')
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/usb.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/include/soc/usb.h b/src/soc/intel/apollolake/include/soc/usb.h new file mode 100644 index 0000000000..7220023199 --- /dev/null +++ b/src/soc/intel/apollolake/include/soc/usb.h @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Intel Corp. + * (Written by Kane Chen <Kane.Chen@intel.com> for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _SOC_APOLLOLAKE_USB_H_ +#define _SOC_APOLLOLAKE_USB_H_ + +#define APOLLOLAKE_USB2_PORT_MAX 8 + +struct usb2_eye_per_port { + uint8_t Usb20PerPortTxPeHalf; + uint8_t Usb20PerPortPeTxiSet; + uint8_t Usb20PerPortTxiSet; + uint8_t Usb20HsSkewSel; + uint8_t Usb20IUsbTxEmphasisEn; + uint8_t Usb20PerPortRXISet; + uint8_t Usb20HsNpreDrvSel; +}; + +#endif /* _SOC_APOLLOLAKE_USB_H_ */ |