diff options
author | Hannah Williams <hannah.williams@intel.com> | 2016-06-08 17:39:37 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-06-24 19:11:21 +0200 |
commit | 8ecd6f849c51bff6072f78e080b04a50735488b1 (patch) | |
tree | 58e015c646e7e763bece8b7ff46c21ac010876a3 /src/soc/intel/apollolake/include | |
parent | 82ef8ada82bd63ea7ce61843189fd4ee5de45cb5 (diff) |
soc/intel/apollolake: Include _PTS, _WAK and _SWS
Change-Id: I3400611095978421c7b35a7ea9c68b8571942ae9
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/15138
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/include')
-rw-r--r-- | src/soc/intel/apollolake/include/soc/nvs.h | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h index fda35561b0..c7918126d7 100644 --- a/src/soc/intel/apollolake/include/soc/nvs.h +++ b/src/soc/intel/apollolake/include/soc/nvs.h @@ -28,13 +28,15 @@ struct global_nvs_t { /* Miscellaneous */ - uint8_t pcnt; /* 0x00 - Processor Count */ - uint8_t ppcm; /* 0x01 - Max PPC State */ - uint8_t lids; /* 0x02 - LID State */ - uint8_t pwrs; /* 0x03 - AC Power State */ - uint8_t dpte; /* 0x04 - Enable DPTF */ + uint8_t pcnt; /* 0x00 - Processor Count */ + uint8_t ppcm; /* 0x01 - Max PPC State */ + uint8_t lids; /* 0x02 - LID State */ + uint8_t pwrs; /* 0x03 - AC Power State */ + uint8_t dpte; /* 0x04 - Enable DPTF */ uint32_t cbmc; /* 0x05 - 0x08 - Coreboot Memory Console */ - uint8_t unused[247]; + uint64_t pm1i; /* 0x09 - 0x10 - System Wake Source - PM1 Index */ + uint64_t gpei; /* 0x11 - 0x18 - GPE Wake Source */ + uint8_t unused[231]; /* ChromeOS specific (0x100 - 0xfff) */ chromeos_acpi_t chromeos; |