diff options
| author | Andrey Petrov <andrey.petrov@intel.com> | 2016-04-04 16:10:40 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-04-13 16:08:09 +0200 |
| commit | 28c78abaf72b591092c7ec586e4e42492f49082e (patch) | |
| tree | 68d5e73a5834fd77cbd1dfcea9ab2b79e99cb82a /src/soc/intel/apollolake/include | |
| parent | 108cd0e16d072bef918a3edac2a0e2703f47daba (diff) | |
soc/intel/apollolake: Reserve IMRs (Isolated Memory Regions)
Certain security features on the platform use IMRs. Unfortunately
this memory is unusable for OS or firware. This patch marks IMR
regions as unusable.
Change-Id: I4803c41c699a9cb3349de2b7e0910a0a37cf8e59
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14245
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/apollolake/include')
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/northbridge.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/include/soc/northbridge.h b/src/soc/intel/apollolake/include/soc/northbridge.h index 4a071cb788..b68bc933e9 100644 --- a/src/soc/intel/apollolake/include/soc/northbridge.h +++ b/src/soc/intel/apollolake/include/soc/northbridge.h @@ -23,4 +23,11 @@ #define TOLUD 0xbc /* Top of Low Used Memory */ #define TOUUD 0xa8 /* Top of Upper Usable DRAM */ +/* IMR registers are found under MCHBAR. */ +#define MCHBAR_IMR0BASE 0x6870 +#define MCHBAR_IMR0MASK 0x6874 +#define MCH_IMR_PITCH 0x20 +#define MCH_NUM_IMRS 20 + + #endif /* _SOC_APOLLOLAKE_NORTHBRIDGE_H_ */ |