soc/pci_devs.h: Use consistent naming in soc/pci_devs.h

This patch to make common PCI device name between APL and SKL.

Change-Id: I5e4c7502e9678c0a367e9c7a96cf848d5b24f68e
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/18576
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Martin Roth <martinroth@google.com>

2 files changed, 128 insertions, 93 deletions

diff --git a/src/soc/intel/apollolake/include/soc/i2c.h b/src/soc/intel/apollolake/include/soc/i2c.h
index de1a04af33..f7778e514c 100644
--- a/src/soc/intel/apollolake/include/soc/i2c.h
+++ b/src/soc/intel/apollolake/include/soc/i2c.h
@@ -29,9 +29,9 @@
 static inline int i2c_bus_to_devfn(unsigned int bus)
 {
 	if (bus >= 0 && bus <= 3)
-		return PCI_DEVFN(LPSS_DEV_SLOT_I2C_D0, bus);
+		return PCI_DEVFN(PCH_DEV_SLOT_SIO1, bus);
 	else if (bus >= 4 && bus <= 7)
-		return PCI_DEVFN(LPSS_DEV_SLOT_I2C_D1, (bus - 4));
+		return PCI_DEVFN(PCH_DEV_SLOT_SIO2, (bus - 4));
 	else
 		return -1;
 }
@@ -39,9 +39,9 @@ static inline int i2c_bus_to_devfn(unsigned int bus)
 /* Convert PCI device and function to I2C bus number */
 static inline int i2c_devfn_to_bus(unsigned int devfn)
 {
-	if (PCI_SLOT(devfn) == LPSS_DEV_SLOT_I2C_D0)
+	if (PCI_SLOT(devfn) == PCH_DEV_SLOT_SIO1)
 		return PCI_FUNC(devfn);
-	else if (PCI_SLOT(devfn) == LPSS_DEV_SLOT_I2C_D1)
+	else if (PCI_SLOT(devfn) == PCH_DEV_SLOT_SIO2)
 		return PCI_FUNC(devfn) + 4;
 	else
 		return -1;
diff --git a/src/soc/intel/apollolake/include/soc/pci_devs.h b/src/soc/intel/apollolake/include/soc/pci_devs.h
index 3e4dcb235e..6aa2520b55 100644
--- a/src/soc/intel/apollolake/include/soc/pci_devs.h
+++ b/src/soc/intel/apollolake/include/soc/pci_devs.h
@@ -15,112 +15,147 @@
 #ifndef _SOC_APOLLOLAKE_PCI_DEVS_H_
 #define _SOC_APOLLOLAKE_PCI_DEVS_H_
 
+#include <device/pci_def.h>
 #include <rules.h>
 
-#define _LPSS_PCI_DEVFN(slot, func)	PCI_DEVFN(LPSS_DEV_SLOT_##slot, func)
-#define _PCI_DEVFN(slot, func)		PCI_DEVFN(slot, func)
+#define _SA_DEVFN(slot)		PCI_DEVFN(SA_DEV_SLOT_ ## slot, 0)
+#define _PCH_DEVFN(slot, func)	PCI_DEVFN(PCH_DEV_SLOT_ ## slot, func)
 
 #if !defined(__SIMPLE_DEVICE__)
 #include <device/device.h>
 #include <device/pci_def.h>
-#define _LPSS_PCI_DEV(slot, func)	dev_find_slot(0, _LPSS_PCI_DEVFN(slot, \
-									 func))
-#define _PCI_DEV(slot, func)		dev_find_slot(0, PCI_DEVFN(slot, func))
+#define _SA_DEV(slot)		dev_find_slot(0, _SA_DEVFN(slot))
+#define _PCH_DEV(slot, func)	dev_find_slot(0, _PCH_DEVFN(slot, func))
 #else
 #include <arch/io.h>
-#define _LPSS_PCI_DEV(slot, func)	PCI_DEV(0, LPSS_DEV_SLOT_##slot, func)
-#define _PCI_DEV(slot, func)		PCI_DEV(0, slot, func)
+#define _SA_DEV(slot)		PCI_DEV(0, SA_DEV_SLOT_ ## slot, 0)
+#define _PCH_DEV(slot, func)	PCI_DEV(0, PCH_DEV_SLOT_ ## slot, func)
 #endif
 
-#define NB_DEVFN			_PCI_DEVFN(0, 0)
-#define NB_DEV_ROOT			_PCI_DEV(0x0, 0)
-
-#define PUNIT_DEV			_PCI_DEV(0, 1)
-#define PUNIT_DEVFN			_PCI_DEVFN(0x0, 1)
-
-#define IGD_DEV				_PCI_DEV(0x2, 0)
-#define IGD_DEVFN			_PCI_DEVFN(0x2, 0)
-
-#define P2SB_DEV			_PCI_DEV(0xd, 0)
-#define P2SB_DEVFN			_PCI_DEVFN(0xd, 0)
-
-#define PMC_DEV				_PCI_DEV(0xd, 1)
-#define PMC_DEVFN			_PCI_DEVFN(0xd, 1)
-
-#define SPI_DEV				_PCI_DEV(0xd, 2)
-#define SPI_DEVFN			_PCI_DEVFN(0xd, 2)
-
-#define HDA_DEV				_PCI_DEV(0xe, 0)
-#define HDA_DEVFN			_PCI_DEVFN(0xe, 0)
-
-#define HECI1_DEV			_PCI_DEV(0xf, 0)
-#define HECI1_DEVFN			_PCI_DEVFN(0xf, 0)
-
-#define ISH_DEV				_PCI_DEV(0x11, 0)
-#define ISH_DEVFN			_PCI_DEVFN(0x11, 0)
-
-#define SATA_DEV			_PCI_DEV(0x12, 0)
-#define SATA_DEVFN			_PCI_DEVFN(0x12, 0)
-
-#define PCIEA0_DEVFN			_PCI_DEVFN(0x13, 0)
-#define PCIEA1_DEVFN			_PCI_DEVFN(0x13, 1)
-#define PCIEA2_DEVFN			_PCI_DEVFN(0x13, 2)
-#define PCIEA3_DEVFN			_PCI_DEVFN(0x13, 3)
-#define PCIEB0_DEVFN			_PCI_DEVFN(0x14, 0)
-#define PCIEB1_DEVFN			_PCI_DEVFN(0x14, 1)
-
-#define XHCI_DEV			_PCI_DEV(0x15, 0)
-#define XHCI_DEVFN			_PCI_DEVFN(0x15, 0)
-
-#define XDCI_DEV			_PCI_DEV(0x15, 1)
-#define XDCI_DEVFN			_PCI_DEVFN(0x15, 1)
+/* System Agent Devices */
+
+#define SA_DEV_SLOT_ROOT	0x00
+#define  SA_DEVFN_ROOT		_SA_DEVFN(ROOT)
+#define  SA_DEV_ROOT		_SA_DEV(ROOT)
+
+#define SA_DEV_SLOT_PUNIT	0x01
+#define  SA_DEVFN_PUNIT		_SA_DEVFN(PUNIT)
+#define  SA_DEV_PUNIT		_SA_DEV(PUNIT)
+
+#define SA_DEV_SLOT_IGD		0x02
+#define  SA_DEVFN_IGD		_SA_DEVFN(IGD)
+#define  SA_DEV_IGD		_SA_DEV(IGD)
+
+/* PCH Devices */
+
+#define PCH_DEV_SLOT_P2SB	0x0d
+#define  PCH_DEVFN_P2SB		_PCH_DEVFN(P2SB, 0)
+#define  PCH_DEVFN_PMC		_PCH_DEVFN(P2SB, 1)
+#define  PCH_DEVFN_SPI		_PCH_DEVFN(P2SB, 2)
+#define  PCH_DEV_P2SB		_PCH_DEV(P2SB, 0)
+#define  PCH_DEV_PMC		_PCH_DEV(P2SB, 1)
+#define  PCH_DEV_SPI		_PCH_DEV(P2SB, 2)
+
+#define PCH_DEV_SLOT_HDA	0x0e
+#define  PCH_DEVFN_HDA		_PCH_DEVFN(HDA, 0)
+#define  PCH_DEV_HDA		_PCH_DEV(HDA, 0)
+
+#define PCH_DEV_SLOT_CSE	0x0f
+#define  PCH_DEVFN_CSE		_PCH_DEVFN(CSE, 0)
+#define  PCH_DEV_CSE		_PCH_DEV(CSE, 0)
+
+#define PCH_DEV_SLOT_ISH	0x11
+#define  PCH_DEVFN_ISH		_PCH_DEVFN(ISH, 0)
+#define  PCH_DEV_ISH		_PCH_DEV(ISH, 0)
+
+#define PCH_DEV_SLOT_SATA	0x12
+#define  PCH_DEVFN_SATA		_PCH_DEVFN(SATA, 0)
+#define  PCH_DEV_SATA		_PCH_DEV(SATA, 0)
+
+#define PCH_DEV_SLOT_PCIE	0x13
+#define  PCH_DEVFN_PCIE1	_PCH_DEVFN(PCIE, 0)
+#define  PCH_DEVFN_PCIE2	_PCH_DEVFN(PCIE, 1)
+#define  PCH_DEVFN_PCIE3	_PCH_DEVFN(PCIE, 2)
+#define  PCH_DEVFN_PCIE4	_PCH_DEVFN(PCIE, 3)
+#define  PCH_DEV_PCIE1		_PCH_DEV(PCIE, 0)
+#define  PCH_DEV_PCIE2		_PCH_DEV(PCIE, 1)
+#define  PCH_DEV_PCIE3		_PCH_DEV(PCIE, 2)
+#define  PCH_DEV_PCIE4		_PCH_DEV(PCIE, 3)
+
+#define PCH_DEV_SLOT_PCIE_1	0x14
+#define  PCH_DEVFN_PCIE5	_PCH_DEVFN(PCIE_1, 0)
+#define  PCH_DEVFN_PCIE6	_PCH_DEVFN(PCIE_1, 1)
+#define  PCH_DEV_PCIE5		_PCH_DEV(PCIE_1, 0)
+#define  PCH_DEV_PCIE6		_PCH_DEV(PCIE_1, 1)
+
+#define PCH_DEV_SLOT_XHCI	0x15
+#define  PCH_DEVFN_XHCI		_PCH_DEVFN(XHCI, 0)
+#define  PCH_DEVFN_XDCI		_PCH_DEVFN(XHCI, 1)
+#define  PCH_DEV_XHCI		_PCH_DEV(XHCI, 0)
+#define  PCH_DEV_XDCI		_PCH_DEV(XHCI, 1)
 
 /* LPSS I2C, 2 devices cover 8 controllers */
-#define LPSS_DEV_SLOT_I2C_D0		0x16
-#define  LPSS_DEVFN_I2C0		_LPSS_PCI_DEVFN(I2C_D0, 0)
-#define  LPSS_DEVFN_I2C1		_LPSS_PCI_DEVFN(I2C_D0, 1)
-#define  LPSS_DEVFN_I2C2		_LPSS_PCI_DEVFN(I2C_D0, 2)
-#define  LPSS_DEVFN_I2C3		_LPSS_PCI_DEVFN(I2C_D0, 3)
-#define LPSS_DEV_SLOT_I2C_D1		0x17
-#define  LPSS_DEVFN_I2C4		_LPSS_PCI_DEVFN(I2C_D1, 0)
-#define  LPSS_DEVFN_I2C5		_LPSS_PCI_DEVFN(I2C_D1, 1)
-#define  LPSS_DEVFN_I2C6		_LPSS_PCI_DEVFN(I2C_D1, 2)
-#define  LPSS_DEVFN_I2C7		_LPSS_PCI_DEVFN(I2C_D1, 3)
+#define PCH_DEV_SLOT_SIO1	0x16
+#define  PCH_DEVFN_I2C0		_PCH_DEVFN(SIO1, 0)
+#define  PCH_DEVFN_I2C1		_PCH_DEVFN(SIO1, 1)
+#define  PCH_DEVFN_I2C2		_PCH_DEVFN(SIO1, 2)
+#define  PCH_DEVFN_I2C3		_PCH_DEVFN(SIO1, 3)
+#define  PCH_DEV_I2C0		_PCH_DEV(SIO1, 0)
+#define  PCH_DEV_I2C1		_PCH_DEV(SIO1, 1)
+#define  PCH_DEV_I2C2		_PCH_DEV(SIO1, 2)
+#define  PCH_DEV_I2C3		_PCH_DEV(SIO1, 3)
+
+#define PCH_DEV_SLOT_SIO2	0x17
+#define  PCH_DEVFN_I2C4		_PCH_DEVFN(SIO2, 0)
+#define  PCH_DEVFN_I2C5		_PCH_DEVFN(SIO2, 1)
+#define  PCH_DEVFN_I2C6		_PCH_DEVFN(SIO2, 2)
+#define  PCH_DEVFN_I2C7		_PCH_DEVFN(SIO2, 3)
+#define  PCH_DEV_I2C4		_PCH_DEV(SIO2, 0)
+#define  PCH_DEV_I2C5		_PCH_DEV(SIO2, 1)
+#define  PCH_DEV_I2C6		_PCH_DEV(SIO2, 2)
+#define  PCH_DEV_I2C7		_PCH_DEV(SIO2, 3)
 
 /* LPSS UART */
-#define LPSS_DEV_SLOT_UART		0x18
-#define  LPSS_DEVFN_UART0		_LPSS_PCI_DEVFN(UART, 0)
-#define  LPSS_DEVFN_UART1		_LPSS_PCI_DEVFN(UART, 1)
-#define  LPSS_DEVFN_UART2		_LPSS_PCI_DEVFN(UART, 2)
-#define  LPSS_DEVFN_UART3		_LPSS_PCI_DEVFN(UART, 3)
-#define  LPSS_DEV_UART0			_LPSS_PCI_DEV(UART, 0)
-#define  LPSS_DEV_UART1			_LPSS_PCI_DEV(UART, 1)
-#define  LPSS_DEV_UART2			_LPSS_PCI_DEV(UART, 2)
-#define  LPSS_DEV_UART3			_LPSS_PCI_DEV(UART, 3)
+#define PCH_DEV_SLOT_UART	0x18
+#define  PCH_DEVFN_UART0	_PCH_DEVFN(UART, 0)
+#define  PCH_DEVFN_UART1	_PCH_DEVFN(UART, 1)
+#define  PCH_DEVFN_UART2	_PCH_DEVFN(UART, 2)
+#define  PCH_DEVFN_UART3	_PCH_DEVFN(UART, 3)
+#define  PCH_DEV_UART0		_PCH_DEV(UART, 0)
+#define  PCH_DEV_UART1		_PCH_DEV(UART, 1)
+#define  PCH_DEV_UART2		_PCH_DEV(UART, 2)
+#define  PCH_DEV_UART3		_PCH_DEV(UART, 3)
 
 /* LPSS SPI */
-#define LPSS_DEV_SLOT_SPI		0x19
-#define  LPSS_DEVFN_SPI0		_LPSS_PCI_DEVFN(SPI, 0)
-#define  LPSS_DEVFN_SPI1		_LPSS_PCI_DEVFN(SPI, 1)
-#define  LPSS_DEVFN_SPI2		_LPSS_PCI_DEVFN(SPI, 2)
+#define PCH_DEV_SLOT_SPI	0x19
+#define  PCH_DEVFN_SPI0		_PCH_DEVFN(SPI, 0)
+#define  PCH_DEVFN_SPI1		_PCH_DEVFN(SPI, 1)
+#define  PCH_DEVFN_SPI2		_PCH_DEVFN(SPI, 2)
+#define  PCH_DEV_SPI0		_PCH_DEV(SPI, 0)
+#define  PCH_DEV_SPI1		_PCH_DEV(SPI, 1)
+#define  PCH_DEV_SPI2		_PCH_DEV(SPI, 2)
 
 /* LPSS PWM */
-#define LPSS_DEV_SLOT_PWM		0x1a
-#define  LPSS_DEVFN_PWM			_LPSS_PCI_DEVFN(PWM, 0)
-
-#define SDCARD_DEV			_PCI_DEV(0x1b, 0)
-#define SDCARD_DEVFN			_PCI_DEVFN(0x1b, 0)
-
-#define EMMC_DEV			_PCI_DEV(0x1c, 0)
-#define EMMC_DEVFN			_PCI_DEVFN(0x1c, 0)
-
-#define SDIO_DEV			_PCI_DEV(0x1e, 0)
-#define SDIO_DEVFN			_PCI_DEVFN(0x1e, 0)
-
-#define LPC_DEV				_PCI_DEV(0x1f, 0)
-#define LPC_DEVFN			_PCI_DEVFN(0x1f, 0)
-
-#define SMBUS_DEV			_PCI_DEV(0x1f, 1)
-#define SMBUS_DEVFN			_PCI_DEVFN(0x1f, 1)
+#define PCH_DEV_SLOT_PWM	0x1a
+#define  PCH_DEVFN_PWM		_PCH_DEVFN(PWM, 0)
+#define  PCH_DEV_PWM		_PCH_DEV(PWM, 0)
+
+#define PCH_DEV_SLOT_SDCARD	0x1b
+#define  PCH_DEVFN_SDCARD	_PCH_DEVFN(SDCARD, 0)
+#define  PCH_DEV_SDCARD		_PCH_DEV(SDCARD, 0)
+
+#define PCH_DEV_SLOT_EMMC	0x1c
+#define  PCH_DEVFN_EMMC		_PCH_DEVFN(EMMC, 0)
+#define  PCH_DEV_EMMC		_PCH_DEV(EMMC, 0)
+
+#define PCH_DEV_SLOT_SDIO	0x1e
+#define  PCH_DEVFN_SDIO		_PCH_DEVFN(SDIO, 0)
+#define  PCH_DEV_SDIO		_PCH_DEV(SDIO, 0)
+
+#define PCH_DEV_SLOT_LPC	0x1f
+#define  PCH_DEVFN_LPC		_PCH_DEVFN(LPC, 0)
+#define  PCH_DEVFN_SMBUS	_PCH_DEVFN(LPC, 1)
+#define  PCH_DEV_LPC		_PCH_DEV(LPC, 0)
+#define  PCH_DEV_SMBUS		_PCH_DEV(LPC, 1)
 
 #endif