diff options
| author | Alexandru Gagniuc <alexandrux.gagniuc@intel.com> | 2016-04-06 10:49:55 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-05-12 04:54:30 +0200 |
| commit | 717dccc3ee7d7f2f25386476b5ef30d8ce3effa4 (patch) | |
| tree | f903b4bbb672832df3caf9130e0280efd790aa99 /src/soc/intel/apollolake/include | |
| parent | c364019486bbdf960d1b217bb87f8ccbb59bc591 (diff) | |
soc/apollolake: Handle non-standard ACPI BAR in PMC device
The ACPI BAR (BAR2 - offset 0x20) is not PCI compliant. That means
that probing may not work. In that case, a resource still needs to be
created for the BAR.
BONUS: We now avoid the need to declare the MMIO resources as fixed.
Change-Id: I52fd2d2718ac8013067aaa450c5eb31e00738ab9
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com>
Reviewed-on: https://review.coreboot.org/14634
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/include')
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/iomap.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/include/soc/iomap.h b/src/soc/intel/apollolake/include/soc/iomap.h index 27f09cc4b6..e676ba5a7f 100644 --- a/src/soc/intel/apollolake/include/soc/iomap.h +++ b/src/soc/intel/apollolake/include/soc/iomap.h @@ -23,6 +23,7 @@ #define MCH_BASE_SIZE (32 * KiB) #define ACPI_PMIO_BASE 0x400 +#define ACPI_PMIO_SIZE 0x100 #define R_ACPI_PM1_TMR 0x8 /* Accesses to these BARs are hardcoded in FSP */ |