diff options
| author | Barnali Sarkar <barnali.sarkar@intel.com> | 2017-05-23 18:17:14 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-06-09 20:01:26 +0200 |
| commit | 66fe0c43be7d886bec8c8aef55c406a53e65642e (patch) | |
| tree | e220be03cbba401f8ad1ceed61d20c4a22a2f906 /src/soc/intel/apollolake/include | |
| parent | 1517bab69303dba1166a2f78b84f647618bbd003 (diff) | |
soc/intel/apollolake: Use CPU common library code
This patch makes SOC files to use common/block/cpu/cpulib.c
file's helper functions.
Change-Id: I529c67cf20253cf819d1c13849300788104b083c
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/19827
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake/include')
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/cpu.h | 13 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/romstage.h | 1 |
2 files changed, 1 insertions, 13 deletions
diff --git a/src/soc/intel/apollolake/include/soc/cpu.h b/src/soc/intel/apollolake/include/soc/cpu.h index 54fcf52625..0e73d115f4 100644 --- a/src/soc/intel/apollolake/include/soc/cpu.h +++ b/src/soc/intel/apollolake/include/soc/cpu.h @@ -18,23 +18,10 @@ #ifndef _SOC_APOLLOLAKE_CPU_H_ #define _SOC_APOLLOLAKE_CPU_H_ -#include <intelblocks/msr.h> - -#ifndef __ASSEMBLER__ -#include <cpu/x86/msr.h> -#include <device/device.h> - -void set_max_freq(void); -void enable_untrusted_mode(void); -#endif - #define CPUID_APOLLOLAKE_A0 0x506c8 #define CPUID_APOLLOLAKE_B0 0x506c9 /* Common Timer Copy (CTC) frequency - 19.2MHz. */ #define CTC_FREQ 19200000 -/* This is burst mode BIT 38 in MSR_IA32_MISC_ENABLES MSR at offset 1A0h */ -#define APL_BURST_MODE_DISABLE 0x40 - #endif /* _SOC_APOLLOLAKE_CPU_H_ */ diff --git a/src/soc/intel/apollolake/include/soc/romstage.h b/src/soc/intel/apollolake/include/soc/romstage.h index 6ae46b69dd..fe3add6eee 100644 --- a/src/soc/intel/apollolake/include/soc/romstage.h +++ b/src/soc/intel/apollolake/include/soc/romstage.h @@ -21,6 +21,7 @@ #include <arch/cpu.h> #include <fsp/api.h> +void set_max_freq(void); void mainboard_memory_init_params(FSPM_UPD *mupd); void mainboard_save_dimm_info(void); |