diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-02-01 19:01:36 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2022-02-03 17:12:04 +0000 |
| commit | 480e7e5ac88e35ce3ac8a1d30bac72b062d68878 (patch) | |
| tree | b3f059e1fc61524f3074e09002a712bbdc88b694 /src/soc/intel/apollolake/include | |
| parent | 1d886639ce680010a21e64d7122dfcfa92a9f505 (diff) | |
soc/intel/apollolake: Rename PWRMBASE macro and function
This patch ensures PWRMBASE macro name and function to get PWRMBASE
address on APL SoC is aligned with other IA SoC.
PMC_BAR0 -> PCH_PWRM_BASE_ADDRESS
read_pmc_mmio_bar() -> pmc_mmio_regs()
Additionally, make `pmc_mmio_regs` a public function for other IA common
code may need to get access to this function.
BUG=None
TEST=None
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I3a61117f34b60ed6eeb9bda3ad853f0ffe6390f7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61532
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/include')
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/iomap.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/pm.h | 3 |
2 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/include/soc/iomap.h b/src/soc/intel/apollolake/include/soc/iomap.h index 5e5b40e2e1..e92227bc1d 100644 --- a/src/soc/intel/apollolake/include/soc/iomap.h +++ b/src/soc/intel/apollolake/include/soc/iomap.h @@ -25,7 +25,7 @@ #define ACPI_PMIO_CST_REG (ACPI_BASE_ADDRESS + 0x14) /* Accesses to these BARs are hardcoded in FSP */ -#define PMC_BAR0 0xfe042000 +#define PCH_PWRM_BASE_ADDRESS 0xfe042000 #define PMC_BAR1 0xfe044000 #define PMC_BAR0_SIZE (8 * KiB) diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h index bc50b87d45..01efaff43a 100644 --- a/src/soc/intel/apollolake/include/soc/pm.h +++ b/src/soc/intel/apollolake/include/soc/pm.h @@ -235,6 +235,9 @@ struct chipset_power_state { void pch_log_state(void); +/* Get base address PMC memory mapped registers. */ +uint8_t *pmc_mmio_regs(void); + /* STM Support */ uint16_t get_pmbase(void); |