soc/intel/apollolake: Wrap lines at 80 columns

Fix the following warning detected by checkpatch.pl:

WARNING: line over 80 characters

TEST=Build for reef

Change-Id: I4fbe95037ca4b52e64ba37e5c739af4a03f64feb
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18728
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

5 files changed, 22 insertions, 17 deletions

diff --git a/src/soc/intel/apollolake/include/FspUpd.h b/src/soc/intel/apollolake/include/FspUpd.h
index a7114ce39e..d98c42e10b 100644
--- a/src/soc/intel/apollolake/include/FspUpd.h
+++ b/src/soc/intel/apollolake/include/FspUpd.h
@@ -37,11 +37,11 @@ are permitted provided that the following conditions are met:
 
 #pragma pack(push, 1)
 
-#define FSPT_UPD_SIGNATURE               0x545F4450554C5041        /* 'APLUPD_T' */
+#define FSPT_UPD_SIGNATURE            0x545F4450554C5041        /* 'APLUPD_T' */
 
-#define FSPM_UPD_SIGNATURE               0x4D5F4450554C5041        /* 'APLUPD_M' */
+#define FSPM_UPD_SIGNATURE            0x4D5F4450554C5041        /* 'APLUPD_M' */
 
-#define FSPS_UPD_SIGNATURE               0x535F4450554C5041        /* 'APLUPD_S' */
+#define FSPS_UPD_SIGNATURE            0x535F4450554C5041        /* 'APLUPD_S' */
 
 #pragma pack(pop)
 
diff --git a/src/soc/intel/apollolake/include/soc/flash_ctrlr.h b/src/soc/intel/apollolake/include/soc/flash_ctrlr.h
index 5b9c6222b3..336ce5266f 100644
--- a/src/soc/intel/apollolake/include/soc/flash_ctrlr.h
+++ b/src/soc/intel/apollolake/include/soc/flash_ctrlr.h
@@ -50,7 +50,8 @@
 #define  SPIBAR_HSFSTS_FBDC(n)		(((n) << 24) & SPIBAR_HSFSTS_FBDC_MASK)
 #define  SPIBAR_HSFSTS_WET		(1 << 21)
 #define  SPIBAR_HSFSTS_FCYCLE_MASK	(0xf << 17)
-#define  SPIBAR_HSFSTS_FCYCLE(cyc)	(((cyc) << 17) & SPIBAR_HSFSTS_FCYCLE_MASK)
+#define  SPIBAR_HSFSTS_FCYCLE(cyc)	(((cyc) << 17) \
+					& SPIBAR_HSFSTS_FCYCLE_MASK)
 #define  SPIBAR_HSFSTS_FGO		(1 << 16)
 #define  SPIBAR_HSFSTS_FLOCKDN		(1 << 15)
 #define  SPIBAR_HSFSTS_FDV		(1 << 14)
diff --git a/src/soc/intel/apollolake/include/soc/gpio_defs.h b/src/soc/intel/apollolake/include/soc/gpio_defs.h
index 18b95c9c63..2fdf10f7f7 100644
--- a/src/soc/intel/apollolake/include/soc/gpio_defs.h
+++ b/src/soc/intel/apollolake/include/soc/gpio_defs.h
@@ -436,7 +436,8 @@
 #define GPIO_COMM_SW_NAME		"INT3452:03"
 
 /* Default configurations */
-#define PAD_CFG0_DEFAULT_FUNC(x)	(PAD_CFG0_RESET_DEEP | PAD_CFG0_MODE_FUNC(x))
+#define PAD_CFG0_DEFAULT_FUNC(x)	(PAD_CFG0_RESET_DEEP \
+					| PAD_CFG0_MODE_FUNC(x))
 #define PAD_CFG0_DEFAULT_NATIVE		PAD_CFG0_DEFAULT_FUNC(1)
 
 #define PAD_CFG1_DEFAULT_PULLUP		PAD_CFG1_PULL_UP_20K
diff --git a/src/soc/intel/apollolake/include/soc/pci_devs.h b/src/soc/intel/apollolake/include/soc/pci_devs.h
index 572fd38100..3e4dcb235e 100644
--- a/src/soc/intel/apollolake/include/soc/pci_devs.h
+++ b/src/soc/intel/apollolake/include/soc/pci_devs.h
@@ -23,7 +23,8 @@
 #if !defined(__SIMPLE_DEVICE__)
 #include <device/device.h>
 #include <device/pci_def.h>
-#define _LPSS_PCI_DEV(slot, func)	dev_find_slot(0, _LPSS_PCI_DEVFN(slot, func))
+#define _LPSS_PCI_DEV(slot, func)	dev_find_slot(0, _LPSS_PCI_DEVFN(slot, \
+									 func))
 #define _PCI_DEV(slot, func)		dev_find_slot(0, PCI_DEVFN(slot, func))
 #else
 #include <arch/io.h>
diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h
index d3299b8282..f754541bc2 100644
--- a/src/soc/intel/apollolake/include/soc/pm.h
+++ b/src/soc/intel/apollolake/include/soc/pm.h
@@ -68,17 +68,19 @@
 #define SMI_EOS			1
 #define SMI_GBL			0
 
-#define   USB_EN		(1 << SMI_XHCI) /* Legacy USB2 SMI logic */
-#define   PERIODIC_EN		(1 << SMI_PERIODIC) /* SMI on PERIODIC_STS in SMI_STS */
-#define   TCO_EN		(1 << SMI_TCO) /* Enable TCO Logic (BIOSWE et al) */
-#define   GPIO_EN		(1 << SMI_GPIO) /* Enable GPIO SMI */
-#define   BIOS_RLS		(1 << SMI_BIOS_RLS) /* asserts SCI on bit set */
-#define   SWSMI_TMR_EN		(1 << SMI_SWSMI_TMR) /* start software smi timer on bit set */
-#define   APMC_EN		(1 << SMI_APMC) /* Writes to APM_CNT cause SMI# */
-#define   SLP_SMI_EN		(1 << SMI_SLP) /* Write to SLP_EN in PM1_CNT asserts SMI# */
-#define   BIOS_EN		(1 << SMI_BIOS) /* Assert SMI# on GBL_RLS bit */
-#define   EOS			(1 << SMI_EOS) /* End of SMI (deassert SMI#) */
-#define   GBL_SMI_EN		(1 << SMI_GBL) /* Global SMI Enable */
+#define   USB_EN	(1 << SMI_XHCI) /* Legacy USB2 SMI logic */
+#define   PERIODIC_EN	(1 << SMI_PERIODIC) /* SMI on PERIODIC_STS in SMI_STS */
+#define   TCO_EN	(1 << SMI_TCO) /* Enable TCO Logic (BIOSWE et al) */
+#define   GPIO_EN	(1 << SMI_GPIO) /* Enable GPIO SMI */
+#define   BIOS_RLS	(1 << SMI_BIOS_RLS) /* asserts SCI on bit set */
+/* start software smi timer on bit set */
+#define   SWSMI_TMR_EN	(1 << SMI_SWSMI_TMR)
+#define   APMC_EN	(1 << SMI_APMC) /* Writes to APM_CNT cause SMI# */
+/* Write to SLP_EN in PM1_CNT asserts SMI# */
+#define   SLP_SMI_EN	(1 << SMI_SLP)
+#define   BIOS_EN	(1 << SMI_BIOS) /* Assert SMI# on GBL_RLS bit */
+#define   EOS		(1 << SMI_EOS) /* End of SMI (deassert SMI#) */
+#define   GBL_SMI_EN	(1 << SMI_GBL) /* Global SMI Enable */
 
 #define SMI_STS			0x44
 /* Bits for SMI status */