diff options
author | Shankar, Vaibhav <vaibhav.shankar@intel.com> | 2016-07-13 14:00:08 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2016-08-02 18:39:38 +0200 |
commit | 67d169721ade4e4d9ca827a4817894522696b5de (patch) | |
tree | 2046caed6bedee0ca4b4461f8e529b5cde7bb265 /src/soc/intel/apollolake/gpio.c | |
parent | 5aea588f693c476f95bfac53cc9e51695c9f4979 (diff) |
soc/intel/apollolake: Add iosstate macros for GPIO
IO Standby State (IOSSTATE): The I/O Standby State defines
which state the pad should be parked in when the I/O is in a
standby state. Iosstate set to 15 means IO-Standby is ignored
for this pin (same as functional mode), So that pin keeps on
functioning in S3/S0iX.
Change-Id: Ie51ff86a2ea63fa6535407fcc2df7a137ee43e8b
Signed-off-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Signed-off-by: Shankar, Vaibhav <vaibhav.shankar@intel.com>
Reviewed-on: https://review.coreboot.org/15776
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/gpio.c')
-rw-r--r-- | src/soc/intel/apollolake/gpio.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/gpio.c b/src/soc/intel/apollolake/gpio.c index a3ffb3de0f..2d325255e7 100644 --- a/src/soc/intel/apollolake/gpio.c +++ b/src/soc/intel/apollolake/gpio.c @@ -85,10 +85,19 @@ static void gpio_configure_itss(const struct pad_config *cfg, void gpio_configure_pad(const struct pad_config *cfg) { + uint32_t dw1; const struct pad_community *comm = gpio_get_community(cfg->pad); uint16_t config_offset = PAD_CFG_OFFSET(cfg->pad - comm->first_pad); + + /* Iostandby bits are tentatively stored in [3:0] bits (RO) of config1. + * dw1 is used to extract the bits of Iostandby. + * This is done to preserve config1 size as unit16 in gpio.h. + */ + dw1 = cfg->config1 & ~PAD_CFG1_IOSSTATE_MASK; + dw1 |= (cfg->config1 & PAD_CFG1_IOSSTATE_MASK) << PAD_CFG1_IOSSTATE_SHIFT; + iosf_write(comm->port, config_offset, cfg->config0); - iosf_write(comm->port, config_offset + sizeof(uint32_t), cfg->config1); + iosf_write(comm->port, config_offset + sizeof(uint32_t), dw1); gpio_configure_itss(cfg, comm->port, config_offset); } |