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authorDuncan Laurie <dlaurie@chromium.org>2016-06-29 10:47:48 -0700
committerDuncan Laurie <dlaurie@chromium.org>2016-07-02 01:19:35 +0200
commitd25dd99866bffc55c2213f18a658364ef8532413 (patch)
treeb9c8eb0e969870dd68e02dcb875c1c27eb37624f /src/soc/intel/apollolake/gpio.c
parent5b6c28c43dee455b643e13d7f0debd79835a5f50 (diff)
soc/intel/apollolake: Add function to translate gpio_t into ACPI pin
There are four GPIO communities in this SOC and they are implemented as separate ACPI devices. This means the pin number that is used in an ACPI GPIO declaration needs to be relative to the community that the pin resides in. Also select GENERIC_GPIO_LIB in the SOC Kconfig so this function actually gets used. This was tested on the reef mainboard by verifying the output of the SSDT for the Maxim 98357A codec that the assigned GPIO_76 is listed as pin 0x24 which is the value relative to the Northwest community. Change-Id: Iad2ab8eccf4c91185a075ffce8d41c81f06c1113 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/15513 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/apollolake/gpio.c')
-rw-r--r--src/soc/intel/apollolake/gpio.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/gpio.c b/src/soc/intel/apollolake/gpio.c
index d0ef6482da..ac0d83b810 100644
--- a/src/soc/intel/apollolake/gpio.c
+++ b/src/soc/intel/apollolake/gpio.c
@@ -132,3 +132,21 @@ const char *gpio_acpi_path(gpio_t gpio_num)
return NULL;
}
+
+uint16_t gpio_acpi_pin(gpio_t gpio_num)
+{
+ const struct pad_community *comm = gpio_get_community(gpio_num);
+
+ switch (comm->port) {
+ case GPIO_NORTH:
+ return PAD_N(gpio_num);
+ case GPIO_NORTHWEST:
+ return PAD_NW(gpio_num);
+ case GPIO_WEST:
+ return PAD_W(gpio_num);
+ case GPIO_SOUTHWEST:
+ return PAD_SW(gpio_num);
+ }
+
+ return gpio_num;
+}