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authorSubrata Banik <subrata.banik@intel.com>2017-03-03 18:23:59 +0530
committerMartin Roth <martinroth@google.com>2017-03-28 16:39:01 +0200
commitfc4c7d8320d329d3712cb74e527dca4178f71bf8 (patch)
tree41bfe5e1b64cbf070a378309e49df5be3cd3f881 /src/soc/intel/apollolake/exit_car.S
parent03e971cd23e96b9293fc3ecc420f56ad91326cd9 (diff)
soc/intel/apollolake: Clean up code by using common CAR init
This patch currently contains common CAR initialization required in bootblock phase along with common MSR header - 1. Use SOC_INTEL_COMMON_BLOCK_CAR to have common CAR initialization and CAR teardown. 2. Use common MSR header "intelblocks/msr.h" inside soc/cpu.h Change-Id: I67f909f50a24f009b3e35388665251be1dde40f7 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/18555 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/apollolake/exit_car.S')
-rw-r--r--src/soc/intel/apollolake/exit_car.S68
1 files changed, 0 insertions, 68 deletions
diff --git a/src/soc/intel/apollolake/exit_car.S b/src/soc/intel/apollolake/exit_car.S
deleted file mode 100644
index e21aa294ce..0000000000
--- a/src/soc/intel/apollolake/exit_car.S
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2016 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <cpu/x86/mtrr.h>
-#include <cpu/x86/cr.h>
-#include <soc/cpu.h>
-
-.text
-.global chipset_teardown_car
-chipset_teardown_car:
- /*
- * Retrieve return address from stack as it will get trashed below if
- * execution is utilizing the cache-as-ram stack.
- */
- pop %ebx
-
- /* Disable MTRRs. */
- mov $(MTRR_DEF_TYPE_MSR), %ecx
- rdmsr
- and $(~(MTRR_DEF_TYPE_EN | MTRR_DEF_TYPE_FIX_EN)), %eax
- wrmsr
-
-#if IS_ENABLED(CONFIG_CAR_CQOS)
- /* Go back to all-evicting mode, set both masks to all-1s */
- mov $MSR_L2_QOS_MASK(0), %ecx
- rdmsr
- mov $~0, %al
- wrmsr
-
- mov $MSR_L2_QOS_MASK(1), %ecx
- rdmsr
- mov $~0, %al
- wrmsr
-
- /* Reset CLOS selector to 0 */
- mov $MSR_IA32_PQR_ASSOC, %ecx
- rdmsr
- and $~IA32_PQR_ASSOC_MASK, %edx
- wrmsr
-#endif
- /* invalidate cache contents. */
- invd
-
-#if IS_ENABLED(CONFIG_CAR_NEM)
- /* Knock down bit 1 then bit 0 of NEM control not combining steps. */
- mov $(MSR_EVICT_CTL), %ecx
- rdmsr
- and $(~(1 << 1)), %eax
- wrmsr
- and $(~(1 << 0)), %eax
- wrmsr
-#endif
-
- /* Return to caller. */
- jmp *%ebx