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authorTim Wawrzynczak <twawrzynczak@chromium.org>2020-11-10 13:39:37 -0700
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-12-10 17:45:47 +0000
commit56fcfb5b4f00830d0c1bf2230e1104045d795c82 (patch)
tree877ce586fdcf6f0acf82b9001661eba7aa1bc99b /src/soc/intel/apollolake/elog.c
parentc0bdf89ff458f84e332aa861809a23997ce1b905 (diff)
soc/intel/common: Adapt XHCI elog driver for reuse
Currently this XHCI driver assumes the PCH XHCI controller, but the TCSS or North XHCI block has a similar enough PCI MMIO structure to make this code mostly reusable. 1) Rename everything to drop the `pch_` prefix 2) xhci_update_wake_event() now takes in a pci_devfn_t for the XHCI controller 3) soc_get_xhci_usb_info() also now takes a pci_devfn_t for the XHCI controller BUG=b:172279037 TEST=plug in USB keyboard while in S0, enter S0ix and verify entry via EC; type on keyboard, verify it wakes up, eventlog contains: 39 | 2020-12-10 09:40:21 | S0ix Enter 40 | 2020-12-10 09:40:42 | S0ix Exit 41 | 2020-12-10 09:40:42 | Wake Source | PME - XHCI (USB 2.0 port) | 1 42 | 2020-12-10 09:40:42 | Wake Source | GPE # | 109 which verifies it still functions for the PCH XHCI controller Change-Id: I9f28354e031e3eda587f4faf8ef7595dce8b33ea Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47411 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake/elog.c')
-rw-r--r--src/soc/intel/apollolake/elog.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/elog.c b/src/soc/intel/apollolake/elog.c
index 3e82c32e69..b65ab10e6d 100644
--- a/src/soc/intel/apollolake/elog.c
+++ b/src/soc/intel/apollolake/elog.c
@@ -2,6 +2,7 @@
#include <cbmem.h>
#include <console/console.h>
+#include <device/pci_type.h>
#include <elog.h>
#include <intelblocks/pmclib.h>
#include <intelblocks/xhci.h>
@@ -24,6 +25,10 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start)
static void pch_log_wake_source(struct chipset_power_state *ps)
{
+ const struct xhci_wake_info xhci_wake_info[] = {
+ { PCH_DEVFN_XHCI, ELOG_WAKE_SOURCE_PME_XHCI },
+ };
+
/* Power Button */
if (ps->pm1_sts & PWRBTN_STS)
elog_add_event_wake(ELOG_WAKE_SOURCE_PWRBTN, 0);
@@ -42,7 +47,8 @@ static void pch_log_wake_source(struct chipset_power_state *ps)
/* XHCI */
if (ps->gpe0_sts[GPE0_A] & XHCI_PME_STS)
- pch_xhci_update_wake_event(soc_get_xhci_usb_info());
+ xhci_update_wake_event(xhci_wake_info,
+ ARRAY_SIZE(xhci_wake_info));
/* SMBUS Wake */
if (ps->gpe0_sts[GPE0_A] & SMB_WAK_STS)