diff options
| author | Ravi Sarawadi <ravishankar.sarawadi@intel.com> | 2017-08-04 16:26:09 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-08-15 19:59:21 +0000 |
| commit | efa606b77b93254d0e378ceab851753886f5efec (patch) | |
| tree | 517952c4eb87995678b7f3ddc057bad1790d0251 /src/soc/intel/apollolake/chip.h | |
| parent | a045fb9de8602ca44d312c997ee607ab86c41ba4 (diff) | |
soc/intel/common/block: Add LPC Common code and use it for APL
Add LPC common code to be shared across Intel platforms.
Also add LPC library functions to be shared across platforms.
Use common LPC code for Apollo Lake soc. Update existing Apollolake
mainboard variants {google,intel,siemens} to use new common
LPC header file.
Change-Id: I6ac2e9c195b9ecda97415890cc615f4efb04a27a
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Reviewed-on: https://review.coreboot.org/20659
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/chip.h')
| -rw-r--r-- | src/soc/intel/apollolake/chip.h | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index 93bb5a1c40..7b36089b3c 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -20,6 +20,7 @@ #include <soc/gpe.h> #include <soc/gpio.h> +#include <intelblocks/lpc_lib.h> #include <intelblocks/lpss_i2c.h> #include <device/i2c.h> #include <soc/pm.h> @@ -28,13 +29,6 @@ #define CLKREQ_DISABLED 0xf #define APOLLOLAKE_I2C_DEV_MAX 8 -/* Serial IRQ control. SERIRQ_QUIET is the default (0). */ -enum serirq_mode { - SERIRQ_QUIET, - SERIRQ_CONTINUOUS, - SERIRQ_OFF, -}; - struct soc_intel_apollolake_config { /* * Mapping from PCIe root port to CLKREQ input on the SOC. The SOC has |