diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-09 10:59:25 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-13 17:52:40 +0100 |
| commit | 07441b5ae6db1d171474b393d98d7da9595bcc8a (patch) | |
| tree | e22dfbe505da5cf90320aa07d533beafbd3681db /src/soc/intel/apollolake/chip.h | |
| parent | a4447535968549136668185dac6854e95beb9930 (diff) | |
soc/intel/apollolake: Wrap lines at 80 columns
Fix the following warning detected by checkpatch.pl:
WARNING: line over 80 characters
TEST=Build for reef
Change-Id: I4fbe95037ca4b52e64ba37e5c739af4a03f64feb
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18728
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/apollolake/chip.h')
| -rw-r--r-- | src/soc/intel/apollolake/chip.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index 051816ddde..3221be7ac8 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -62,14 +62,16 @@ struct soc_intel_apollolake_config { /* [30:24] SDR50 mode Number of dealy elements.Each = 125pSec. * [22:16] DDR50 mode Number of dealy elements.Each = 125pSec. * [14:8] SDR25/HS50 mode Number of dealy elements.Each = 125pSec. - * [6:0] SDR12/Compatibility mode Number of dealy elements.Each = 125pSec. + * [6:0] SDR12/Compatibility mode Number of dealy elements. + * Each = 125pSec. */ uint32_t emmc_tx_data_cntl2; /* [30:24] SDR50 mode Number of dealy elements.Each = 125pSec. * [22:16] DDR50 mode Number of dealy elements.Each = 125pSec. * [14:8] SDR25/HS50 mode Number of dealy elements.Each = 125pSec. - * [6:0] SDR12/Compatibility mode Number of dealy elements.Each = 125pSec. + * [6:0] SDR12/Compatibility mode Number of dealy elements. + * Each = 125pSec. */ uint32_t emmc_rx_cmd_data_cntl1; |