diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2018-03-26 02:19:58 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-03-28 06:43:40 +0000 |
| commit | 4c8fbc065874d352b2215739bae0e0ae8a04757e (patch) | |
| tree | 973d1907075af5c7c211672292767617c036e061 /src/soc/intel/apollolake/chip.c | |
| parent | 4df7d2c4953822c33be77e20e2ceff896e4a65c5 (diff) | |
soc/intel/apollolake: Limit xDCI feature when VBOOT is enabled
Use the common xDCI function to check if the controller is allowed
in the current mode before enabling it. Otherwise, disable the
PCI device if it has been enabled in devicetree.
Change-Id: I5aea15511c52d1191babf551feb237f4144683e4
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/25364
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/chip.c')
| -rw-r--r-- | src/soc/intel/apollolake/chip.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index cac2f1134b..1dd6daf16c 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -30,6 +30,7 @@ #include <intelblocks/fast_spi.h> #include <intelblocks/p2sb.h> #include <intelblocks/msr.h> +#include <intelblocks/xdci.h> #include <fsp/api.h> #include <fsp/util.h> #include <intelblocks/cpulib.h> @@ -585,6 +586,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd) glk_fsp_silicon_init_params_cb(cfg, silconfig); else apl_fsp_silicon_init_params_cb(cfg, silconfig); + + /* Enable xDCI controller if enabled in devicetree and allowed */ + dev = dev_find_slot(0, PCH_DEVFN_XDCI); + if (!xdci_can_enable()) + dev->enabled = 0; + silconfig->UsbOtg = dev->enabled; } struct chip_operations soc_intel_apollolake_ops = { |