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authorAamir Bohra <aamir.bohra@intel.com>2017-05-25 14:12:01 +0530
committerAaron Durbin <adurbin@chromium.org>2017-06-05 00:32:48 +0200
commit842776e1dcb310e889d2ba922be9d7b81a1c2dd0 (patch)
treec6276bf0cffe9c8cd436689665b1814757cb92f6 /src/soc/intel/apollolake/bootblock
parent1fa16c9cb6c486cdd4b1bcb3734308b28b9c9a22 (diff)
soc/intel/skylake: Use Intel timer common code
Use timer code from soc/intel/common. This code removes monotonic timer refrence w.r.t MSR 24Mhz counter(0x637) and use tsc timer. Change-Id: I7fad620b11c9e5db128f646639c79ea58a0a574f Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/19912 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/bootblock')
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