diff options
| author | Barnali Sarkar <barnali.sarkar@intel.com> | 2017-06-05 20:01:14 +0530 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-06-09 19:27:14 +0200 |
| commit | 9e55ff6a879ee6eb96988e52020c4c20a4898c4f (patch) | |
| tree | a002c8c99a306cc25b0e8de5622af646aee76535 /src/soc/intel/apollolake/bootblock | |
| parent | f004f66ca7b0c428c04d6025738319187cf911fe (diff) | |
soc/intel/apollolake: Rename ACPI Base Address and Size Macro
Rename these two Macros to help use Common Code -
ACPI_PMIO_BASE --> ACPI_BASE_ADDRESS
ACPI_PMIO_SIZE --> ACPI_BASE_SIZE
Change-Id: I21125b7206c241692cfdf1cdb10b8b3dee62b24a
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/20038
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake/bootblock')
| -rw-r--r-- | src/soc/intel/apollolake/bootblock/bootblock.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c index 5c059d97c2..705567a614 100644 --- a/src/soc/intel/apollolake/bootblock/bootblock.c +++ b/src/soc/intel/apollolake/bootblock/bootblock.c @@ -56,7 +56,7 @@ asmlinkage void bootblock_c_entry(uint64_t base_timestamp) /* Decode the ACPI I/O port range for early firmware verification.*/ dev = PCH_DEV_PMC; - pci_write_config16(dev, PCI_BASE_ADDRESS_4, ACPI_PMIO_BASE); + pci_write_config16(dev, PCI_BASE_ADDRESS_4, ACPI_BASE_ADDRESS); pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MASTER); @@ -75,7 +75,7 @@ static void enable_pmcbar(void) pci_write_config32(pmc, PCI_BASE_ADDRESS_1, 0); /* 64-bit BAR */ pci_write_config32(pmc, PCI_BASE_ADDRESS_2, PMC_BAR1); pci_write_config32(pmc, PCI_BASE_ADDRESS_3, 0); /* 64-bit BAR */ - pci_write_config16(pmc, PCI_BASE_ADDRESS_4, ACPI_PMIO_BASE); + pci_write_config16(pmc, PCI_BASE_ADDRESS_4, ACPI_BASE_ADDRESS); pci_write_config16(pmc, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); |