soc/intel/{apl,cnl,icl,skl,tgl}: Clean up SA ASL code

List of changes in this patch

1. Remove unused variables
2. Make use of absolute path
3. Define macros and use inside SA ASL
4. Rearrange code in nothbridge.asl to move MCRS object under _CRS

Change-Id: Id74269ec5a96b087562ccdf2141233db5585ae59
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38154
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lance Zhao <lance.zhao@gmail.com>

1 files changed, 77 insertions, 76 deletions

diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl
index 2f2a064f1b..027e2a623c 100644
--- a/src/soc/intel/apollolake/acpi/northbridge.asl
+++ b/src/soc/intel/apollolake/acpi/northbridge.asl
@@ -15,112 +15,113 @@
  * GNU General Public License for more details.
  */
 
-	Name(_HID, EISAID("PNP0A08"))	/* PCIe */
-	Name(_CID, EISAID("PNP0A03"))	/* PCI */
-	Name(_BBN, 0)
+#define BASE_64GB	0x1000000000
+
+Name(_HID, EISAID("PNP0A08"))	/* PCIe */
+Name(_CID, EISAID("PNP0A03"))	/* PCI */
 
 Device (MCHC)
 {
 	Name (_ADR, 0x00000000)		/*Dev0 Func0 */
 
-		OperationRegion (MCHP, PCI_Config, 0x00, 0x100)
-		Field (MCHP, DWordAcc, NoLock, Preserve)
-		{
-			Offset(0x60),
-			MCNF,	32,	/* PCI MMCONF base */
-			Offset (0xA8),
-			TUUD, 64,	/* Top of Upper Used Memory */
-			Offset(0xB4),
-			BGSM,   32,	/* Base of Graphics Stolen Memory */
-			Offset(0xBC),
-			TLUD,   32,	/* Top of Low Useable DRAM */
-		}
+	OperationRegion (MCHP, PCI_Config, 0x00, 0x100)
+	Field (MCHP, DWordAcc, NoLock, Preserve)
+	{
+		Offset(0x60),
+		MCNF,	32,	/* PCI MMCONF base */
+		Offset (0xA8),
+		TUUD, 64,	/* Top of Upper Used Memory */
+		Offset(0xB4),
+		BGSM,   32,	/* Base of Graphics Stolen Memory */
+		Offset(0xBC),
+		TLUD,   32,	/* Top of Low Useable DRAM */
+	}
 }
-Name (MCRS, ResourceTemplate()
-{
-	/* Bus Numbers */
-	WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
-			0x0000, 0x0000, 0x00ff, 0x0000, 0x0100,,,)
-
-	/* IO Region 0 */
-	DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
-			0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8,,,)
-
-	/* PCI Config Space */
-	Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
-
-	/* IO Region 1 */
-	DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
-			0x0000, 0x01000, 0xffff, 0x0000, 0xf000,,,)
-
-	/* VGA memory (0xa0000-0xbffff) */
-	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-			Cacheable, ReadWrite,
-			0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
-			0x00020000,,,)
-
-	/* Data and GFX stolen memory */
-	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-			Cacheable, ReadWrite,
-			0x00000000, 0x3be00000, 0x3fffffff, 0x00000000,
-			0x04200000,,, STOM)
-
-	/*
-	 * PCI MMIO Region (TOLUD - PCI extended base MMCONF)
-	 * This assumes that MMCONF is placed after PCI config space,
-	 * and that no resources are allocated after the MMCONF region.
-	 * This works, sicne MMCONF is hardcoded to 0xe00000000.
-	 */
-	DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-			NonCacheable, ReadWrite,
-			0x00000000, 0x00000000, 0x00000000, 0x00000000,
-			0x00000000,,, PM01)
-
-	/* PCI Memory Region (TOUUD - (TOUUD + ABOVE_4G_MMIO_SIZE)) */
-	QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-			NonCacheable, ReadWrite,
-			0x00000000, 0x10000, 0x1ffff, 0x00000000,
-			0x10000,,, PM02)
-})
 
 /* Current Resource Settings */
 Method (_CRS, 0, Serialized)
 {
+	Name (MCRS, ResourceTemplate()
+	{
+		/* Bus Numbers */
+		WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+				0x0000, 0x0000, 0x00ff, 0x0000, 0x0100,,,)
+
+		/* IO Region 0 */
+		DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
+				0x0000, 0x0000, 0x0cf7, 0x0000, 0x0cf8,,,)
+
+		/* PCI Config Space */
+		Io (Decode16, 0x0cf8, 0x0cf8, 0x0001, 0x0008)
+
+		/* IO Region 1 */
+		DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
+				0x0000, 0x01000, 0xffff, 0x0000, 0xf000,,,)
+
+		/* VGA memory (0xa0000-0xbffff) */
+		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+				Cacheable, ReadWrite,
+				0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
+				0x00020000,,,)
+
+		/* Data and GFX stolen memory */
+		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+				Cacheable, ReadWrite,
+				0x00000000, 0x3be00000, 0x3fffffff, 0x00000000,
+				0x04200000,,, STOM)
+
+		/*
+		 * PCI MMIO Region (TOLUD - PCI extended base MMCONF)
+		 * This assumes that MMCONF is placed after PCI config space,
+		 * and that no resources are allocated after the MMCONF region.
+		 * This works, sicne MMCONF is hardcoded to 0xe00000000.
+		 */
+		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+				NonCacheable, ReadWrite,
+				0x00000000, 0x00000000, 0x00000000, 0x00000000,
+				0x00000000,,, PM01)
+
+		/* PCI Memory Region (TOUUD - (TOUUD + ABOVE_4G_MMIO_SIZE)) */
+		QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
+				NonCacheable, ReadWrite,
+				0x00000000, 0x10000, 0x1ffff, 0x00000000,
+				0x10000,,, PM02)
+	})
 
 	/* Find PCI resource area in MCRS */
-	CreateDwordField (MCRS, ^PM01._MIN, PMIN)
-	CreateDwordField (MCRS, ^PM01._MAX, PMAX)
-	CreateDwordField (MCRS, ^PM01._LEN, PLEN)
+	CreateDwordField (MCRS, PM01._MIN, PMIN)
+	CreateDwordField (MCRS, PM01._MAX, PMAX)
+	CreateDwordField (MCRS, PM01._LEN, PLEN)
 
 	/* Read C-Unit PCI CFG Reg. 0xBC for TOLUD (shadow from B-Unit) */
-	And(^MCHC.TLUD, 0xFFF00000, PMIN)
+	And(\_SB.PCI0.MCHC.TLUD, 0xFFF00000, PMIN)
 	/* Read MMCONF base */
-	And(^MCHC.MCNF, 0xF0000000, PMAX)
+	And(\_SB.PCI0.MCHC.MCNF, 0xF0000000, PMAX)
 
 	/* Calculate PCI MMIO Length */
 	Add(Subtract(PMAX, PMIN), 1, PLEN)
 
 	/* Find GFX resource area in GCRS */
-	CreateDwordField(MCRS, ^STOM._MIN, GMIN)
-	CreateDwordField(MCRS, ^STOM._MAX, GMAX)
-	CreateDwordField(MCRS, ^STOM._LEN, GLEN)
+	CreateDwordField(MCRS, STOM._MIN, GMIN)
+	CreateDwordField(MCRS, STOM._MAX, GMAX)
+	CreateDwordField(MCRS, STOM._LEN, GLEN)
 
 	/* Read BGSM */
-	And(^MCHC.BGSM, 0xFFF00000, GMIN)
+	And(\_SB.PCI0.MCHC.BGSM, 0xFFF00000, GMIN)
 
 	/* Read TOLUD */
-	And(^MCHC.TLUD, 0xFFF00000, GMAX)
+	And(\_SB.PCI0.MCHC.TLUD, 0xFFF00000, GMAX)
 	Decrement(GMAX)
 	Add(Subtract(GMAX, GMIN), 1, GLEN)
 
 	/* Patch PM02 range based on Memory Size */
-	CreateQwordField (MCRS, ^PM02._MIN, MMIN)
-	CreateQwordField (MCRS, ^PM02._MAX, MMAX)
-	CreateQwordField (MCRS, ^PM02._LEN, MLEN)
+	CreateQwordField (MCRS, PM02._MIN, MMIN)
+	CreateQwordField (MCRS, PM02._MAX, MMAX)
+	CreateQwordField (MCRS, PM02._LEN, MLEN)
 
-	Store (^MCHC.TUUD, Local0)
+	Store (\_SB.PCI0.MCHC.TUUD, Local0)
 
-	If (LLessEqual (Local0, 0x1000000000))
+	If (LLessEqual (Local0, BASE_64GB))
 	{
 		Store (0, MMIN)
 		Store (0, MLEN)