diff options
| author | Michael Niewöhner <foss@mniewoehner.de> | 2021-10-17 15:36:45 +0200 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2021-11-09 16:02:19 +0000 |
| commit | b48caadad54196245f0e7dfcb92caa21e7112307 (patch) | |
| tree | 7652c60718b3eac5f008fba0a8fee34511aa8560 /src/soc/intel/apollolake/acpi | |
| parent | cc66b56c80862a59117a4582abc8d59f092ac59c (diff) | |
soc/intel: generate SSDT instead of using GNVS for SGX
GNVS should not be used for values that are static at runtime. Thus,
use SSDT for the SGX fields.
Change-Id: Icf9f035e0c2b8617eef82fb043293bcb913e3012
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58394
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/apollolake/acpi')
| -rw-r--r-- | src/soc/intel/apollolake/acpi/globalnvs.asl | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/soc/intel/apollolake/acpi/globalnvs.asl b/src/soc/intel/apollolake/acpi/globalnvs.asl index 225e9db7ea..41f2409990 100644 --- a/src/soc/intel/apollolake/acpi/globalnvs.asl +++ b/src/soc/intel/apollolake/acpi/globalnvs.asl @@ -23,9 +23,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve) SCDP, 8, // 0x29 - SD_CD GPIO portid SCDO, 8, // 0x2A - GPIO pad offset relative to the community UIOR, 8, // 0x2B - UART debug controller init on S3 resume - EPCS, 8, // 0x2C - SGX Enabled status - EMNA, 64, // 0x2D - 0x34 EPC base address - ELNG, 64, // 0x35 - 0x3C EPC Length - A4GB, 64, // 0x3D - 0x44 Base of above 4GB MMIO Resource - A4GS, 64, // 0x45 - 0x4C Length of above 4GB MMIO Resource + A4GB, 64, // 0x2C - 0x33 Base of above 4GB MMIO Resource + A4GS, 64, // 0x34 - 0x3B Length of above 4GB MMIO Resource } |