diff options
| author | Lijian Zhao <lijian.zhao@intel.com> | 2016-10-28 11:01:09 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-11-07 20:14:32 +0100 |
| commit | 37742f6870ec1d4b860769db25ef665cdb7c1615 (patch) | |
| tree | c71a1aab1ab51b9084fc30da34115168899a1995 /src/soc/intel/apollolake/acpi/southbridge.asl | |
| parent | cb8849b68671c54ea2521cd8fb1ba289136b5b85 (diff) | |
soc/intel/apollolake: Add pmc_ipc device support
A dedicated pmc_ipc DSDT entry is required for pmc_ipc kernel driver.
The ACPI mode entry includes resources for PMC_IPC1, SRAM, ACPI IO and
Punit Mailbox.
BRANCH=None
BUG=chrome-os-partner:57364
TEST=Boot up into OS successfully and check with dmesg to see the
driver has been loaded successfully without errors.
Change-Id: Ib0a300febe1e7fc1796bfeca1a04493f932640e1
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/17181
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/apollolake/acpi/southbridge.asl')
| -rw-r--r-- | src/soc/intel/apollolake/acpi/southbridge.asl | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/acpi/southbridge.asl b/src/soc/intel/apollolake/acpi/southbridge.asl index 1c10f1a5ed..e3ee1ae496 100644 --- a/src/soc/intel/apollolake/acpi/southbridge.asl +++ b/src/soc/intel/apollolake/acpi/southbridge.asl @@ -46,5 +46,8 @@ Scope (\_SB) /* eMMC */ #include "scs.asl" +/* PMC IPC controller */ +#include "pmc_ipc.asl" + /* PCI _OSC */ #include <soc/intel/common/acpi/pci_osc.asl> |