diff options
| author | Martin Roth <martinroth@google.com> | 2016-04-14 16:41:11 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-04-16 01:52:43 +0200 |
| commit | 433e8d272d1f1b3f6daaa89add5a886e348f29ea (patch) | |
| tree | b1296284d027ba0b16cf4a330d66ffc669e012f9 /src/soc/intel/apollolake/acpi/soc_int.asl | |
| parent | 59493717ad7aee5e4d6179b00c66b21af79e0376 (diff) | |
intel/apollolake: Fix whitespace issues
Change-Id: Ia5bcd19d994e23375d7e6d2050113c809ae57296
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14368
Tested-by: build bot (Jenkins)
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Diffstat (limited to 'src/soc/intel/apollolake/acpi/soc_int.asl')
| -rw-r--r-- | src/soc/intel/apollolake/acpi/soc_int.asl | 61 |
1 files changed, 30 insertions, 31 deletions
diff --git a/src/soc/intel/apollolake/acpi/soc_int.asl b/src/soc/intel/apollolake/acpi/soc_int.asl index a97128eb9b..83a831fcd2 100644 --- a/src/soc/intel/apollolake/acpi/soc_int.asl +++ b/src/soc/intel/apollolake/acpi/soc_int.asl @@ -15,15 +15,15 @@ * GNU General Public License for more details. */ -#ifndef _SOC_INT_DEFINE_ASL_ -#define _SOC_INT_DEFINE_ASL_ +#ifndef _SOC_INT_DEFINE_ASL_ +#define _SOC_INT_DEFINE_ASL_ -#define SDCARD_INT 3 /* Need to be shared by PMC and SCC only*/ -#define UART0_INT 4 /* Need to be shared by PMC and SCC only*/ -#define UART1_INT 5 /* Need to be shared by PMC and SCC only*/ -#define UART2_INT 6 /* Need to be shared by PMC and SCC only*/ -#define UART3_INT 7 /* Need to be shared by PMC and SCC only*/ -#define XDCI_INT 13 /* Need to be shared by PMC and SCC only*/ +#define SDCARD_INT 3 /* Need to be shared by PMC and SCC only*/ +#define UART0_INT 4 /* Need to be shared by PMC and SCC only*/ +#define UART1_INT 5 /* Need to be shared by PMC and SCC only*/ +#define UART2_INT 6 /* Need to be shared by PMC and SCC only*/ +#define UART3_INT 7 /* Need to be shared by PMC and SCC only*/ +#define XDCI_INT 13 /* Need to be shared by PMC and SCC only*/ #define NPK_INT 16 #define PIRQA_INT 16 #define PIRQB_INT 17 @@ -31,27 +31,26 @@ #define SATA_INT 19 #define GEN_INT 19 #define PIRQD_INT 19 -#define XHCI_INT 17 /* Need to be shared by PMC and SCC only*/ -#define SMBUS_INT 20 /* PIRQE */ -#define CSE_INT 20 /* PIRQE */ -#define IUNIT_INT 21 /* PIRQF */ -#define PUNIT_INT 24 -#define AUDIO_INT 25 -#define ISH_INT 26 -#define I2C0_INT 27 -#define I2C1_INT 28 -#define I2C2_INT 29 -#define I2C3_INT 30 -#define I2C4_INT 31 -#define I2C5_INT 32 -#define I2C6_INT 33 -#define I2C7_INT 34 -#define SPI0_INT 35 -#define SPI1_INT 36 -#define SPI2_INT 37 -#define UFS_INT 38 -#define EMMC_INT 39 -#define SDIO_INT 42 +#define XHCI_INT 17 /* Need to be shared by PMC and SCC only*/ +#define SMBUS_INT 20 /* PIRQE */ +#define CSE_INT 20 /* PIRQE */ +#define IUNIT_INT 21 /* PIRQF */ +#define PUNIT_INT 24 +#define AUDIO_INT 25 +#define ISH_INT 26 +#define I2C0_INT 27 +#define I2C1_INT 28 +#define I2C2_INT 29 +#define I2C3_INT 30 +#define I2C4_INT 31 +#define I2C5_INT 32 +#define I2C6_INT 33 +#define I2C7_INT 34 +#define SPI0_INT 35 +#define SPI1_INT 36 +#define SPI2_INT 37 +#define UFS_INT 38 +#define EMMC_INT 39 +#define SDIO_INT 42 - -#endif /* _SOC_INT_DEFINE_ASL_ */
\ No newline at end of file +#endif /* _SOC_INT_DEFINE_ASL_ */ |