diff options
author | Hannah Williams <hannah.williams@intel.com> | 2017-06-24 08:33:15 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-07-28 16:27:53 +0000 |
commit | a61884a8a1338c0e6128cf050827c5d1cd5ef8f3 (patch) | |
tree | 6b2279a81a15f8bbbc25ed2a7fc39073264b16e4 /src/soc/intel/apollolake/acpi/soc_int.asl | |
parent | 3c6377fb4fcdff89e1509e9eeab7ce563dc45053 (diff) |
soc/intel/apollolake: Add CNVI and PCIE IRQs for GLK
Change-Id: I0387ccf6970e6169cbebd232ae210731338d0900
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/20755
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/acpi/soc_int.asl')
-rw-r--r-- | src/soc/intel/apollolake/acpi/soc_int.asl | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/acpi/soc_int.asl b/src/soc/intel/apollolake/acpi/soc_int.asl index c64324478a..11b5460c19 100644 --- a/src/soc/intel/apollolake/acpi/soc_int.asl +++ b/src/soc/intel/apollolake/acpi/soc_int.asl @@ -36,6 +36,8 @@ #define SMBUS_INT 20 /* PIRQE */ #define CSE_INT 20 /* PIRQE */ #define IUNIT_INT 21 /* PIRQF */ +#define PIRQF_INT 21 +#define PIRQG_INT 22 #define PUNIT_INT 24 #define AUDIO_INT 25 #define ISH_INT 26 @@ -54,5 +56,6 @@ #define EMMC_INT 39 #define PMC_INT 40 #define SDIO_INT 42 +#define CNVI_INT 44 #endif /* _SOC_INT_DEFINE_ASL_ */ |