diff options
| author | Martin Roth <martinroth@google.com> | 2016-04-14 16:41:11 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-04-16 01:52:43 +0200 |
| commit | 433e8d272d1f1b3f6daaa89add5a886e348f29ea (patch) | |
| tree | b1296284d027ba0b16cf4a330d66ffc669e012f9 /src/soc/intel/apollolake/acpi/lpss.asl | |
| parent | 59493717ad7aee5e4d6179b00c66b21af79e0376 (diff) | |
intel/apollolake: Fix whitespace issues
Change-Id: Ia5bcd19d994e23375d7e6d2050113c809ae57296
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14368
Tested-by: build bot (Jenkins)
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Diffstat (limited to 'src/soc/intel/apollolake/acpi/lpss.asl')
| -rw-r--r-- | src/soc/intel/apollolake/acpi/lpss.asl | 192 |
1 files changed, 96 insertions, 96 deletions
diff --git a/src/soc/intel/apollolake/acpi/lpss.asl b/src/soc/intel/apollolake/acpi/lpss.asl index a4cb2cf29e..ab97374ddb 100644 --- a/src/soc/intel/apollolake/acpi/lpss.asl +++ b/src/soc/intel/apollolake/acpi/lpss.asl @@ -17,100 +17,100 @@ scope (\_SB.PCI0) { -/* LPIO1 PWM */ -Device(PWM) { - Name (_ADR, 0x001A0000) - Name (_DDN, "Intel(R) PWM Controller") -} - -/* LPIO1 HS-UART #1 */ -Device(URT1) { - Name (_ADR, 0x00180000) - Name (_DDN, "Intel(R) HS-UART Controller #1") -} - -/* LPIO1 HS-UART #2 */ -Device(URT2) { - Name (_ADR, 0x00180001) - Name (_DDN, "Intel(R) HS-UART Controller #2") -} - -/* LPIO1 HS-UART #3 */ -Device(URT3) { - Name (_ADR, 0x00180002) - Name (_DDN, "Intel(R) HS-UART Controller #3") -} - -/* LPIO1 HS-UART #4 */ -Device(URT4) { - Name (_ADR, 0x00180003) - Name (_DDN, "Intel(R) HS-UART Controller #4") -} - -/* LPIO1 SPI */ -Device(SPI1) { - Name (_ADR, 0x00190000) - Name (_DDN, "Intel(R) SPI Controller #1") -} - -/* LPIO1 SPI #2 */ -Device(SPI2) { - Name (_ADR, 0x00190001) - Name (_DDN, "Intel(R) SPI Controller #2") -} - -/* LPIO1 SPI #3 */ -Device(SPI3) { - Name (_ADR, 0x00190002) - Name (_DDN, "Intel(R) SPI Controller #3") -} - - -/* LPIO2 I2C #0 */ -Device(I2C0) { - Name (_ADR, 0x00160000) - Name (_DDN, "Intel(R) I2C Controller #0") -} - -/* LPIO2 I2C #1 */ -Device(I2C1) { - Name (_ADR, 0x00160001) - Name (_DDN, "Intel(R) I2C Controller #1") -} - -/* LPIO2 I2C #2 */ -Device(I2C2) { - Name (_ADR, 0x00160002) - Name (_DDN, "Intel(R) I2C Controller #2") -} - -/* LPIO2 I2C #3 */ -Device(I2C3) { - Name (_ADR, 0x00160003) - Name (_DDN, "Intel(R) I2C Controller #3") -} - -/* LPIO2 I2C #4 */ -Device(I2C4) { - Name (_ADR, 0x00170000) - Name (_DDN, "Intel(R) I2C Controller #4") -} - -/* LPIO2 I2C #5 */ -Device(I2C5) { - Name (_ADR, 0x00170001) - Name (_DDN, "Intel(R) I2C Controller #5") -} - -/* LPIO2 I2C #6 */ -Device(I2C6) { - Name (_ADR, 0x00170002) - Name (_DDN, "Intel(R) I2C Controller #6") -} - -/* LPIO2 I2C #7 */ -Device(I2C7) { - Name (_ADR, 0x00170003) - Name (_DDN, "Intel(R) I2C Controller #7") -} + /* LPIO1 PWM */ + Device(PWM) { + Name (_ADR, 0x001A0000) + Name (_DDN, "Intel(R) PWM Controller") + } + + /* LPIO1 HS-UART #1 */ + Device(URT1) { + Name (_ADR, 0x00180000) + Name (_DDN, "Intel(R) HS-UART Controller #1") + } + + /* LPIO1 HS-UART #2 */ + Device(URT2) { + Name (_ADR, 0x00180001) + Name (_DDN, "Intel(R) HS-UART Controller #2") + } + + /* LPIO1 HS-UART #3 */ + Device(URT3) { + Name (_ADR, 0x00180002) + Name (_DDN, "Intel(R) HS-UART Controller #3") + } + + /* LPIO1 HS-UART #4 */ + Device(URT4) { + Name (_ADR, 0x00180003) + Name (_DDN, "Intel(R) HS-UART Controller #4") + } + + /* LPIO1 SPI */ + Device(SPI1) { + Name (_ADR, 0x00190000) + Name (_DDN, "Intel(R) SPI Controller #1") + } + + /* LPIO1 SPI #2 */ + Device(SPI2) { + Name (_ADR, 0x00190001) + Name (_DDN, "Intel(R) SPI Controller #2") + } + + /* LPIO1 SPI #3 */ + Device(SPI3) { + Name (_ADR, 0x00190002) + Name (_DDN, "Intel(R) SPI Controller #3") + } + + + /* LPIO2 I2C #0 */ + Device(I2C0) { + Name (_ADR, 0x00160000) + Name (_DDN, "Intel(R) I2C Controller #0") + } + + /* LPIO2 I2C #1 */ + Device(I2C1) { + Name (_ADR, 0x00160001) + Name (_DDN, "Intel(R) I2C Controller #1") + } + + /* LPIO2 I2C #2 */ + Device(I2C2) { + Name (_ADR, 0x00160002) + Name (_DDN, "Intel(R) I2C Controller #2") + } + + /* LPIO2 I2C #3 */ + Device(I2C3) { + Name (_ADR, 0x00160003) + Name (_DDN, "Intel(R) I2C Controller #3") + } + + /* LPIO2 I2C #4 */ + Device(I2C4) { + Name (_ADR, 0x00170000) + Name (_DDN, "Intel(R) I2C Controller #4") + } + + /* LPIO2 I2C #5 */ + Device(I2C5) { + Name (_ADR, 0x00170001) + Name (_DDN, "Intel(R) I2C Controller #5") + } + + /* LPIO2 I2C #6 */ + Device(I2C6) { + Name (_ADR, 0x00170002) + Name (_DDN, "Intel(R) I2C Controller #6") + } + + /* LPIO2 I2C #7 */ + Device(I2C7) { + Name (_ADR, 0x00170003) + Name (_DDN, "Intel(R) I2C Controller #7") + } } |